Version 7.2 Build 151 09/26/2007 SJ Full Version
11
945
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
T_control
# storage
db|FFT.(1).cnf
db|FFT.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
T_control.v
e82b5472698beb0cf57e4b133a19078
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
level_total
0110
PARAMETER_UNSIGNED_BIN
USR
idle
000
PARAMETER_UNSIGNED_BIN
USR
sink
001
PARAMETER_UNSIGNED_BIN
USR
Pro_read
011
PARAMETER_UNSIGNED_BIN
USR
Pro_write
111
PARAMETER_UNSIGNED_BIN
USR
source
110
PARAMETER_UNSIGNED_BIN
USR
Wait
101
PARAMETER_UNSIGNED_BIN
USR
scale
0001000000
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
T_control:inst46
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_ram_dq0
# storage
db|FFT.(2).cnf
db|FFT.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_ram_dq0.v
1f4ebaa6226facb3c40fa38dfc9ff0
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
T_control:inst46|lpm_ram_dq0:ram1
T_control:inst46|lpm_ram_dq0:ram2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(3).cnf
db|FFT.(3).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
SINGLE_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
18
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
6
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
64
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_n4a1
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_a
-1
3
data_a
-1
3
clock0
-1
3
address_a
-1
3
wren_b
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
aclr0
-1
1
rden_b
-1
2
rden_a
-1
2
data_b
-1
2
clocken3
-1
2
clocken2
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
T_control:inst46|lpm_ram_dq0:ram1|altsyncram:altsyncram_component
T_control:inst46|lpm_ram_dq0:ram2|altsyncram:altsyncram_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_n4a1
# storage
db|FFT.(4).cnf
db|FFT.(4).cnf
# case_insensitive
# source_file
db|altsyncram_n4a1.tdf
f050eec04744e0acdacfde6f3f81713
6
# used_port {
wren_a
-1
3
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a17
-1
3
q_a16
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
3
data_a4
-1
3
data_a3
-1
3
data_a2
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clock0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# hierarchies {
T_control:inst46|lpm_ram_dq0:ram1|altsyncram:altsyncram_component|altsyncram_n4a1:auto_generated
T_control:inst46|lpm_ram_dq0:ram2|altsyncram:altsyncram_component|altsyncram_n4a1:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ctrl_fft
# storage
db|FFT.(5).cnf
db|FFT.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
ctrl_fft.vhd
21e9486dc662cf7da7f55292c529f7
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
ctrl_fft:inst3
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_fifo0
# storage
db|FFT.(6).cnf
db|FFT.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_fifo0.v
f1f672fa258aa3deb23972aa6dbe842
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
lpm_fifo0:inst24
lpm_fifo0:inst
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
scfifo
# storage
db|FFT.(7).cnf
db|FFT.(7).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|scfifo.tdf
7dcf59d72dfbe1cc231d93cc1fa5ed9
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
lpm_width
18
PARAMETER_SIGNED_DEC
USR
LPM_NUMWORDS
64
PARAMETER_SIGNED_DEC
USR
LPM_WIDTHU
6
PARAMETER_SIGNED_DEC
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
ALLOW_RWCYCLE_WHEN_FULL
OFF
PARAMETER_UNKNOWN
DEF
ADD_RAM_OUTPUT_REGISTER
OFF
PARAMETER_UNKNOWN
USR
ALMOST_FULL_VALUE
0
PARAMETER_UNKNOWN
DEF
ALMOST_EMPTY_VALUE
0
PARAMETER_UNKNOWN
DEF
USE_EAB
ON
PARAMETER_UNKNOWN
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
scfifo_7r31
PARAMETER_UNKNOWN
USR
}
# used_port {
wrreq
-1
3
usedw
-1
3
rdreq
-1
3
q
-1
3
full
-1
3
empty
-1
3
data
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_regfifo.inc
afe6bfc54c15224ce61beaea9e71dc
e:|altera|72|quartus|libraries|megafunctions|a_dpfifo.inc
748303753a041187a5d4113b5f62acf
e:|altera|72|quartus|libraries|megafunctions|a_i2fifo.inc
ca5bb76c5a51df22b24c8b01cbcc918
e:|altera|72|quartus|libraries|megafunctions|a_fffifo.inc
ebf62e69b8fb10b5db33a57861298d55
e:|altera|72|quartus|libraries|megafunctions|a_f2fifo.inc
9bc132bd4e9e2ef1fb9633f6a742f
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component
lpm_fifo0:inst|scfifo:scfifo_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
scfifo_7r31
# storage
db|FFT.(8).cnf
db|FFT.(8).cnf
# case_insensitive
# source_file
db|scfifo_7r31.tdf
1f7b7b409d5cd0765fd9a5282c56b996
6
# used_port {
wrreq
-1
3
usedw5
-1
3
usedw4
-1
3
usedw3
-1
3
usedw2
-1
3
usedw1
-1
3
usedw0
-1
3
rdreq
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
full
-1
3
empty
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
a_dpfifo_e141
# storage
db|FFT.(9).cnf
db|FFT.(9).cnf
# case_insensitive
# source_file
db|a_dpfifo_e141.tdf
88eeaf5b1b6db2ed63a9d11a947d33d
6
# used_port {
wreq
-1
3
usedw5
-1
3
usedw4
-1
3
usedw3
-1
3
usedw2
-1
3
usedw1
-1
3
usedw0
-1
3
sclr
-1
3
rreq
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
full
-1
3
empty
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
a_fefifo_b6f
# storage
db|FFT.(10).cnf
db|FFT.(10).cnf
# case_insensitive
# source_file
db|a_fefifo_b6f.tdf
678b1de95efe861ad880f5a8aebc7e
6
# used_port {
wreq
-1
3
usedw_out5
-1
3
usedw_out4
-1
3
usedw_out3
-1
3
usedw_out2
-1
3
usedw_out1
-1
3
usedw_out0
-1
3
sclr
-1
3
rreq
-1
3
full
-1
3
empty
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|a_fefifo_b6f:fifo_state
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|a_fefifo_b6f:fifo_state
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_tk7
# storage
db|FFT.(11).cnf
db|FFT.(11).cnf
# case_insensitive
# source_file
db|cntr_tk7.tdf
2e3bcbf92c6ac02d47b98db3a8696ff
6
# used_port {
updown
-1
3
sclr
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|a_fefifo_b6f:fifo_state|cntr_tk7:count_usedw
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|a_fefifo_b6f:fifo_state|cntr_tk7:count_usedw
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
dpram_fv01
# storage
db|FFT.(12).cnf
db|FFT.(12).cnf
# case_insensitive
# source_file
db|dpram_fv01.tdf
c90414dd2f7c7d57c6f9a5223a2ab6
6
# used_port {
wren
-1
3
wraddress5
-1
3
wraddress4
-1
3
wraddress3
-1
3
wraddress2
-1
3
wraddress1
-1
3
wraddress0
-1
3
rdaddress5
-1
3
rdaddress4
-1
3
rdaddress3
-1
3
rdaddress2
-1
3
rdaddress1
-1
3
rdaddress0
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
outclocken
-1
3
outclock
-1
3
inclock
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|dpram_fv01:FIFOram
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|dpram_fv01:FIFOram
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_avj1
# storage
db|FFT.(13).cnf
db|FFT.(13).cnf
# case_insensitive
# source_file
db|altsyncram_avj1.tdf
c87ffc941d13d407f7af888d8b36dfc
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b5
-1
3
q_b4
-1
3
q_b3
-1
3
q_b2
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
3
data_a4
-1
3
data_a3
-1
3
data_a2
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|dpram_fv01:FIFOram|altsyncram_avj1:altsyncram1
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|dpram_fv01:FIFOram|altsyncram_avj1:altsyncram1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_fjb
# storage
db|FFT.(14).cnf
db|FFT.(14).cnf
# case_insensitive
# source_file
db|cntr_fjb.tdf
2861c9d4e9ca9be6aa7a76c2104db429
6
# used_port {
sclr
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|cntr_fjb:rd_ptr_count
lpm_fifo0:inst24|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|cntr_fjb:wr_ptr
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|cntr_fjb:rd_ptr_count
lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7r31:auto_generated|a_dpfifo_e141:dpfifo|cntr_fjb:wr_ptr
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
p2s
# storage
db|FFT.(15).cnf
db|FFT.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
p2s.v
865547573ceb76b0bf95b3466a89445
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
scale
1000000
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
p2s:inst28
p2s:inst13
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
butterfly
# storage
db|FFT.(16).cnf
db|FFT.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
butterfly.v
af2ffb7f39bba2d790baf0c46bc16fb9
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
scale
01000000
PARAMETER_UNSIGNED_BIN
USR
idle
00
PARAMETER_UNSIGNED_BIN
USR
work
01
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
butterfly:inst48
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ADD_17
# storage
db|FFT.(17).cnf
db|FFT.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
ADD_17.v
fa72fa80a12e6099598a1798e4381426
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
butterfly:inst48|ADD_17:add_real
butterfly:inst48|ADD_17:add_imag
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(18).cnf
db|FFT.(18).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
17
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
4
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_vmg
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|ADD_17:add_real|lpm_add_sub:lpm_add_sub_component
butterfly:inst48|ADD_17:add_imag|lpm_add_sub:lpm_add_sub_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_vmg
# storage
db|FFT.(19).cnf
db|FFT.(19).cnf
# case_insensitive
# source_file
db|add_sub_vmg.tdf
15228e207ca81a3b615ff6915357a28
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
}
# hierarchies {
butterfly:inst48|ADD_17:add_real|lpm_add_sub:lpm_add_sub_component|add_sub_vmg:auto_generated
butterfly:inst48|ADD_17:add_imag|lpm_add_sub:lpm_add_sub_component|add_sub_vmg:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
SUB_17
# storage
db|FFT.(20).cnf
db|FFT.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
SUB_17.v
baaba6fec5818e7fcf477defdc9b4d5
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
butterfly:inst48|SUB_17:sub_real
butterfly:inst48|SUB_17:sub_imag
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(21).cnf
db|FFT.(21).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
17
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
SUB
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_4qe
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|SUB_17:sub_real|lpm_add_sub:lpm_add_sub_component
butterfly:inst48|SUB_17:sub_imag|lpm_add_sub:lpm_add_sub_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_4qe
# storage
db|FFT.(22).cnf
db|FFT.(22).cnf
# case_insensitive
# source_file
db|add_sub_4qe.tdf
1993c98ab88ef4ef7113a2722a3c6e7f
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
}
# hierarchies {
butterfly:inst48|SUB_17:sub_real|lpm_add_sub:lpm_add_sub_component|add_sub_4qe:auto_generated
butterfly:inst48|SUB_17:sub_imag|lpm_add_sub:lpm_add_sub_component|add_sub_4qe:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
complex_mult
# storage
db|FFT.(23).cnf
db|FFT.(23).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
db|complex_mult.v
5e8b89f6f6224f2737cf47548e93d0
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
butterfly:inst48|complex_mult:mult
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
complex_mult_altmult_complex_q5p
# storage
db|FFT.(24).cnf
db|FFT.(24).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
db|complex_mult.v
5e8b89f6f6224f2737cf47548e93d0
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altmult_add
# storage
db|FFT.(25).cnf
db|FFT.(25).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altmult_add.tdf
303edfcfd2173d4f711a8aa270644b
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
ACCUM_DIRECTION
ADD
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ACCUMULATOR
NO
PARAMETER_UNKNOWN
DEF
ADDER1_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
ADDER3_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_ACLR1
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_ACLR3
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_ACLR1
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_ACLR3
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_REGISTER3
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_REGISTER1
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_REGISTER3
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ADDER
NO
PARAMETER_UNKNOWN
DEF
CHAINOUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATION
NO
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_CIRCUITRY
AUTO
PARAMETER_UNKNOWN
DEF
DSP_BLOCK_BALANCING
AUTO
PARAMETER_UNKNOWN
USR
EXTRA_LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A0
ACLR0
PARAMETER_UNKNOWN
USR
INPUT_ACLR_A1
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A2
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A3
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B0
ACLR0
PARAMETER_UNKNOWN
USR
INPUT_ACLR_B1
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B2
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B3
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_A0
CLOCK0
PARAMETER_UNKNOWN
USR
INPUT_REGISTER_A1
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_A2
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_A3
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_B0
CLOCK0
PARAMETER_UNKNOWN
USR
INPUT_REGISTER_B1
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_B2
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_B3
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A0
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A1
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A2
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A3
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B0
DATAB
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B1
DATAB
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B2
DATAB
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B3
DATAB
PARAMETER_UNKNOWN
DEF
MULT01_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
MULT01_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULT01_SATURATION_ACLR
ACLR2
PARAMETER_UNKNOWN
DEF
MULT01_SATURATION_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULT23_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
MULT23_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULT23_SATURATION_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
MULT23_SATURATION_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULTIPLIER01_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER01_SATURATION
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER1_DIRECTION
ADD
PARAMETER_UNKNOWN
DEF
MULTIPLIER23_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER23_SATURATION
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER3_DIRECTION
ADD
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR0
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR1
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR2
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR3
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_REGISTER0
UNREGISTERED
PARAMETER_UNKNOWN
USR
MULTIPLIER_REGISTER1
CLOCK0
PARAMETER_UNKNOWN
DEF
MULTIPLIER_REGISTER2
CLOCK0
PARAMETER_UNKNOWN
DEF
MULTIPLIER_REGISTER3
CLOCK0
PARAMETER_UNKNOWN
DEF
NUMBER_OF_MULTIPLIERS
1
PARAMETER_SIGNED_DEC
USR
OUTPUT_ACLR
ACLR0
PARAMETER_UNKNOWN
USR
OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
USR
OUTPUT_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_TYPE
NEAREST_INTEGER
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_TYPE
ASYMMETRIC
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATION
NO
PARAMETER_UNKNOWN
DEF
port_addnsub1
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
port_addnsub3
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
PORT_CHAINOUT_SAT_IS_OVERFLOW
PORT_UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT0_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT1_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT2_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT3_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_OUTPUT_IS_OVERFLOW
PORT_UNUSED
PARAMETER_UNKNOWN
DEF
port_signa
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
port_signb
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
REPRESENTATION_A
SIGNED
PARAMETER_UNKNOWN
USR
REPRESENTATION_B
SIGNED
PARAMETER_UNKNOWN
USR
ROTATE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ROTATE_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ROTATE_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ROTATE_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ROTATE_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ROTATE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
WIDTH_MSB
17
PARAMETER_UNKNOWN
DEF
WIDTH_SATURATE_SIGN
1
PARAMETER_UNKNOWN
DEF
SCANOUTA_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SCANOUTA_REGISTER
UNREGISTERED
PARAMETER_UNKNOWN
DEF
SHIFT_MODE
NO
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_ACLR_A
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_ACLR_B
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_ACLR_A
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_ACLR_B
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_REGISTER_A
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_REGISTER_B
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_REGISTER_A
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_REGISTER_B
CLOCK0
PARAMETER_UNKNOWN
DEF
WIDTH_A
17
PARAMETER_SIGNED_DEC
USR
WIDTH_B
17
PARAMETER_SIGNED_DEC
USR
WIDTH_CHAININ
1
PARAMETER_UNKNOWN
DEF
WIDTH_RESULT
34
PARAMETER_SIGNED_DEC
USR
ZERO_CHAINOUT_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_CHAINOUT_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_add_dqa1
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock0
-1
3
aclr0
-1
1
ena0
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|stratix_mac_mult.inc
37fae19b7be3fd367b8beebe8242bb70
e:|altera|72|quartus|libraries|megafunctions|stratix_mac_out.inc
7e6e79cdf4a1237186d7c89ebab37e
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add1
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
mult_add_dqa1
# storage
db|FFT.(26).cnf
db|FFT.(26).cnf
# case_insensitive
# source_file
db|mult_add_dqa1.tdf
425f44d1614b892f36a1b1d24bcfb0
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock0
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add1|mult_add_dqa1:auto_generated
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add2|mult_add_dqa1:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ded_mult_1t51
# storage
db|FFT.(27).cnf
db|FFT.(27).cnf
# case_insensitive
# source_file
db|ded_mult_1t51.tdf
77b8fdd06968248d4e859dadd6a8a6
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
ena0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock0
-1
3
aclr0
-1
3
aclr3
-1
1
aclr2
-1
1
aclr1
-1
1
ena3
-1
2
ena2
-1
2
ena1
-1
2
clock3
-1
2
clock2
-1
2
clock1
-1
2
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add1|mult_add_dqa1:auto_generated|ded_mult_1t51:ded_mult1
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add2|mult_add_dqa1:auto_generated|ded_mult_1t51:ded_mult1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
dffpipe_b3c
# storage
db|FFT.(28).cnf
db|FFT.(28).cnf
# case_insensitive
# source_file
db|dffpipe_b3c.tdf
3ecfba4f67972d18f8a3e26e7bca9e
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q33
-1
3
q32
-1
3
q31
-1
3
q30
-1
3
q3
-1
3
q29
-1
3
q28
-1
3
q27
-1
3
q26
-1
3
q25
-1
3
q24
-1
3
q23
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2
-1
3
q19
-1
3
q18
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
d9
-1
3
d8
-1
3
d7
-1
3
d6
-1
3
d5
-1
3
d4
-1
3
d33
-1
3
d32
-1
3
d31
-1
3
d30
-1
3
d3
-1
3
d29
-1
3
d28
-1
3
d27
-1
3
d26
-1
3
d25
-1
3
d24
-1
3
d23
-1
3
d22
-1
3
d21
-1
3
d20
-1
3
d2
-1
3
d19
-1
3
d18
-1
3
d17
-1
3
d16
-1
3
d15
-1
3
d14
-1
3
d13
-1
3
d12
-1
3
d11
-1
3
d10
-1
3
d1
-1
3
d0
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add1|mult_add_dqa1:auto_generated|ded_mult_1t51:ded_mult1|dffpipe_b3c:pre_result
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add2|mult_add_dqa1:auto_generated|ded_mult_1t51:ded_mult1|dffpipe_b3c:pre_result
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altmult_add
# storage
db|FFT.(29).cnf
db|FFT.(29).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altmult_add.tdf
303edfcfd2173d4f711a8aa270644b
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
ACCUM_DIRECTION
ADD
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ACCUM_SLOAD_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ACCUMULATOR
NO
PARAMETER_UNKNOWN
DEF
ADDER1_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
ADDER3_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB1_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB3_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_ACLR1
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_ACLR3
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_ACLR1
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_ACLR3
ACLR3
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_PIPELINE_REGISTER3
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_REGISTER1
CLOCK0
PARAMETER_UNKNOWN
DEF
ADDNSUB_MULTIPLIER_REGISTER3
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ADDER
NO
PARAMETER_UNKNOWN
DEF
CHAINOUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CHAINOUT_SATURATION
NO
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_CIRCUITRY
AUTO
PARAMETER_UNKNOWN
DEF
DSP_BLOCK_BALANCING
AUTO
PARAMETER_UNKNOWN
USR
EXTRA_LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A0
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A1
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A2
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_A3
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B0
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B1
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B2
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_ACLR_B3
ACLR3
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_A0
UNREGISTERED
PARAMETER_UNKNOWN
USR
INPUT_REGISTER_A1
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_A2
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_A3
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_B0
UNREGISTERED
PARAMETER_UNKNOWN
USR
INPUT_REGISTER_B1
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_B2
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_REGISTER_B3
CLOCK0
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A0
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A1
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A2
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_A3
DATAA
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B0
DATAB
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B1
DATAB
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B2
DATAB
PARAMETER_UNKNOWN
DEF
INPUT_SOURCE_B3
DATAB
PARAMETER_UNKNOWN
DEF
MULT01_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
MULT01_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULT01_SATURATION_ACLR
ACLR2
PARAMETER_UNKNOWN
DEF
MULT01_SATURATION_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULT23_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
MULT23_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULT23_SATURATION_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
MULT23_SATURATION_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
MULTIPLIER01_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER01_SATURATION
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER1_DIRECTION
ADD
PARAMETER_UNKNOWN
DEF
MULTIPLIER23_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER23_SATURATION
NO
PARAMETER_UNKNOWN
DEF
MULTIPLIER3_DIRECTION
ADD
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR0
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR1
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR2
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_ACLR3
ACLR3
PARAMETER_UNKNOWN
DEF
MULTIPLIER_REGISTER0
UNREGISTERED
PARAMETER_UNKNOWN
USR
MULTIPLIER_REGISTER1
CLOCK0
PARAMETER_UNKNOWN
DEF
MULTIPLIER_REGISTER2
CLOCK0
PARAMETER_UNKNOWN
DEF
MULTIPLIER_REGISTER3
CLOCK0
PARAMETER_UNKNOWN
DEF
NUMBER_OF_MULTIPLIERS
1
PARAMETER_SIGNED_DEC
USR
OUTPUT_ACLR
ACLR0
PARAMETER_UNKNOWN
USR
OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
USR
OUTPUT_ROUND_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUND_TYPE
NEAREST_INTEGER
PARAMETER_UNKNOWN
DEF
OUTPUT_ROUNDING
NO
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATE_TYPE
ASYMMETRIC
PARAMETER_UNKNOWN
DEF
OUTPUT_SATURATION
NO
PARAMETER_UNKNOWN
DEF
port_addnsub1
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
port_addnsub3
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
PORT_CHAINOUT_SAT_IS_OVERFLOW
PORT_UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT0_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT1_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT2_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_MULT3_IS_SATURATED
UNUSED
PARAMETER_UNKNOWN
DEF
PORT_OUTPUT_IS_OVERFLOW
PORT_UNUSED
PARAMETER_UNKNOWN
DEF
port_signa
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
port_signb
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
REPRESENTATION_A
SIGNED
PARAMETER_UNKNOWN
USR
REPRESENTATION_B
SIGNED
PARAMETER_UNKNOWN
USR
ROTATE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ROTATE_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ROTATE_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ROTATE_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ROTATE_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ROTATE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
WIDTH_MSB
17
PARAMETER_UNKNOWN
DEF
WIDTH_SATURATE_SIGN
1
PARAMETER_UNKNOWN
DEF
SCANOUTA_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SCANOUTA_REGISTER
UNREGISTERED
PARAMETER_UNKNOWN
DEF
SHIFT_MODE
NO
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
SHIFT_RIGHT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_ACLR_A
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_ACLR_B
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_ACLR_A
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_ACLR_B
ACLR3
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_REGISTER_A
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_PIPELINE_REGISTER_B
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_REGISTER_A
CLOCK0
PARAMETER_UNKNOWN
DEF
SIGNED_REGISTER_B
CLOCK0
PARAMETER_UNKNOWN
DEF
WIDTH_A
18
PARAMETER_SIGNED_DEC
USR
WIDTH_B
18
PARAMETER_SIGNED_DEC
USR
WIDTH_CHAININ
1
PARAMETER_UNKNOWN
DEF
WIDTH_RESULT
36
PARAMETER_SIGNED_DEC
USR
ZERO_CHAINOUT_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_CHAINOUT_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_OUTPUT_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_OUTPUT_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_PIPELINE_ACLR
ACLR3
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_PIPELINE_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
ZERO_LOOPBACK_REGISTER
CLOCK0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_add_ie81
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock0
-1
3
aclr0
-1
1
ena0
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|stratix_mac_mult.inc
37fae19b7be3fd367b8beebe8242bb70
e:|altera|72|quartus|libraries|megafunctions|stratix_mac_out.inc
7e6e79cdf4a1237186d7c89ebab37e
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add6
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
mult_add_ie81
# storage
db|FFT.(30).cnf
db|FFT.(30).cnf
# case_insensitive
# source_file
db|mult_add_ie81.tdf
75a29ed3d53e4e52cb46d081f8761cf7
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result35
-1
3
result34
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock0
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add6|mult_add_ie81:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
ded_mult_2a21
# storage
db|FFT.(31).cnf
db|FFT.(31).cnf
# case_insensitive
# source_file
db|ded_mult_2a21.tdf
ad1f428c4c4617d153c614e6d21b334
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result35
-1
3
result34
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add6|mult_add_ie81:auto_generated|ded_mult_2a21:ded_mult1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
dffpipe_d3c
# storage
db|FFT.(32).cnf
db|FFT.(32).cnf
# case_insensitive
# source_file
db|dffpipe_d3c.tdf
d39d338dfb45667c4ef961887fa9dfee
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q35
-1
3
q34
-1
3
q33
-1
3
q32
-1
3
q31
-1
3
q30
-1
3
q3
-1
3
q29
-1
3
q28
-1
3
q27
-1
3
q26
-1
3
q25
-1
3
q24
-1
3
q23
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2
-1
3
q19
-1
3
q18
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
d9
-1
3
d8
-1
3
d7
-1
3
d6
-1
3
d5
-1
3
d4
-1
3
d35
-1
3
d34
-1
3
d33
-1
3
d32
-1
3
d31
-1
3
d30
-1
3
d3
-1
3
d29
-1
3
d28
-1
3
d27
-1
3
d26
-1
3
d25
-1
3
d24
-1
3
d23
-1
3
d22
-1
3
d21
-1
3
d20
-1
3
d2
-1
3
d19
-1
3
d18
-1
3
d17
-1
3
d16
-1
3
d15
-1
3
d14
-1
3
d13
-1
3
d12
-1
3
d11
-1
3
d10
-1
3
d1
-1
3
d0
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|altmult_add:mult_add6|mult_add_ie81:auto_generated|ded_mult_2a21:ded_mult1|dffpipe_d3c:pre_result
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(33).cnf
db|FFT.(33).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
35
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_esf
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
aclr
-1
1
clken
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:add_sub7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_esf
# storage
db|FFT.(34).cnf
db|FFT.(34).cnf
# case_insensitive
# source_file
db|add_sub_esf.tdf
88a7c455f92561587b51bf188ed0865b
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result34
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab34
-1
3
datab33
-1
3
datab32
-1
3
datab31
-1
3
datab30
-1
3
datab3
-1
3
datab29
-1
3
datab28
-1
3
datab27
-1
3
datab26
-1
3
datab25
-1
3
datab24
-1
3
datab23
-1
3
datab22
-1
3
datab21
-1
3
datab20
-1
3
datab2
-1
3
datab19
-1
3
datab18
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa34
-1
3
dataa33
-1
3
dataa32
-1
3
dataa31
-1
3
dataa30
-1
3
dataa3
-1
3
dataa29
-1
3
dataa28
-1
3
dataa27
-1
3
dataa26
-1
3
dataa25
-1
3
dataa24
-1
3
dataa23
-1
3
dataa22
-1
3
dataa21
-1
3
dataa20
-1
3
dataa2
-1
3
dataa19
-1
3
dataa18
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:add_sub7|add_sub_esf:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(35).cnf
db|FFT.(35).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
18
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_5ii
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
aclr
-1
1
clken
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:adder1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_5ii
# storage
db|FFT.(36).cnf
db|FFT.(36).cnf
# case_insensitive
# source_file
db|add_sub_5ii.tdf
8239d5e33995034a0bcb4ed348cb87
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:adder1|add_sub_5ii:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(37).cnf
db|FFT.(37).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
35
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
2
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_6ii
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
aclr
-1
1
clken
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:adder2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_6ii
# storage
db|FFT.(38).cnf
db|FFT.(38).cnf
# case_insensitive
# source_file
db|add_sub_6ii.tdf
2ce7125a5b7995bf9844bfdf95f937f2
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result34
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab34
-1
3
datab33
-1
3
datab32
-1
3
datab31
-1
3
datab30
-1
3
datab3
-1
3
datab29
-1
3
datab28
-1
3
datab27
-1
3
datab26
-1
3
datab25
-1
3
datab24
-1
3
datab23
-1
3
datab22
-1
3
datab21
-1
3
datab20
-1
3
datab2
-1
3
datab19
-1
3
datab18
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa34
-1
3
dataa33
-1
3
dataa32
-1
3
dataa31
-1
3
dataa30
-1
3
dataa3
-1
3
dataa29
-1
3
dataa28
-1
3
dataa27
-1
3
dataa26
-1
3
dataa25
-1
3
dataa24
-1
3
dataa23
-1
3
dataa22
-1
3
dataa21
-1
3
dataa20
-1
3
dataa2
-1
3
dataa19
-1
3
dataa18
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:adder2|add_sub_6ii:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(39).cnf
db|FFT.(39).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
18
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
SUB
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_6ji
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
aclr
-1
1
clken
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:subtractor1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_6ji
# storage
db|FFT.(40).cnf
db|FFT.(40).cnf
# case_insensitive
# source_file
db|add_sub_6ji.tdf
7acfd15abf55a75272907983fa11340
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:subtractor1|add_sub_6ji:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(41).cnf
db|FFT.(41).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
35
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
SUB
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_5ji
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
aclr
-1
1
clken
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:subtractor2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_5ji
# storage
db|FFT.(42).cnf
db|FFT.(42).cnf
# case_insensitive
# source_file
db|add_sub_5ji.tdf
77177babbef4d715d0425c787f11869e
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result34
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab34
-1
3
datab33
-1
3
datab32
-1
3
datab31
-1
3
datab30
-1
3
datab3
-1
3
datab29
-1
3
datab28
-1
3
datab27
-1
3
datab26
-1
3
datab25
-1
3
datab24
-1
3
datab23
-1
3
datab22
-1
3
datab21
-1
3
datab20
-1
3
datab2
-1
3
datab19
-1
3
datab18
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa34
-1
3
dataa33
-1
3
dataa32
-1
3
dataa31
-1
3
dataa30
-1
3
dataa3
-1
3
dataa29
-1
3
dataa28
-1
3
dataa27
-1
3
dataa26
-1
3
dataa25
-1
3
dataa24
-1
3
dataa23
-1
3
dataa22
-1
3
dataa21
-1
3
dataa20
-1
3
dataa2
-1
3
dataa19
-1
3
dataa18
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:subtractor2|add_sub_5ji:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|FFT.(43).cnf
db|FFT.(43).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
36
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_i5j
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
clock
-1
3
dataa
-1
1
aclr
-1
1
clken
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
e:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
e:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:subtractor3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_i5j
# storage
db|FFT.(44).cnf
db|FFT.(44).cnf
# case_insensitive
# source_file
db|add_sub_i5j.tdf
a699fea5979ad8948ce5d68d4a7acd9
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result35
-1
3
result34
-1
3
result33
-1
3
result32
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab35
-1
3
datab34
-1
3
datab33
-1
3
datab32
-1
3
datab31
-1
3
datab30
-1
3
datab3
-1
3
datab29
-1
3
datab28
-1
3
datab27
-1
3
datab26
-1
3
datab25
-1
3
datab24
-1
3
datab23
-1
3
datab22
-1
3
datab21
-1
3
datab20
-1
3
datab2
-1
3
datab19
-1
3
datab18
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa35
-1
3
dataa34
-1
3
dataa33
-1
3
dataa32
-1
3
dataa31
-1
3
dataa30
-1
3
dataa3
-1
3
dataa29
-1
3
dataa28
-1
3
dataa27
-1
3
dataa26
-1
3
dataa25
-1
3
dataa24
-1
3
dataa23
-1
3
dataa22
-1
3
dataa21
-1
3
dataa20
-1
3
dataa2
-1
3
dataa19
-1
3
dataa18
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_add_sub:subtractor3|add_sub_i5j:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_compare
# storage
db|FFT.(45).cnf
db|FFT.(45).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.tdf
e146d2834445cbf71b2b21591949826f
6
# user_parameter {
lpm_width
17
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
CHAIN_SIZE
8
PARAMETER_UNKNOWN
DEF
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
cmpr_1cg
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
datab
-1
3
dataa
-1
3
alb
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|comptree.inc
da21447b8e66c26bd34c85b6cdda8169
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_compare:comparator1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cmpr_1cg
# storage
db|FFT.(46).cnf
db|FFT.(46).cnf
# case_insensitive
# source_file
db|cmpr_1cg.tdf
85ede76a75a88d267b3cf994f6d471e
6
# used_port {
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
alb
-1
3
}
# hierarchies {
butterfly:inst48|complex_mult:mult|complex_mult_altmult_complex_q5p:complex_mult_altmult_complex_q5p_component|lpm_compare:comparator1|cmpr_1cg:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
s2p
# storage
db|FFT.(47).cnf
db|FFT.(47).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
s2p.v
a6b9bcf36020a6a668f71ba7e49d2b
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
scale
1000000
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
s2p:inst6
s2p:inst7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
D
# storage
db|FFT.(48).cnf
db|FFT.(48).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
D.v
d4404d95cb6478343b5e30204dbf18d
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
D:inst16
D:inst15
D:inst14
D:inst11
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_rom1
# storage
db|FFT.(49).cnf
db|FFT.(49).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_rom1.v
da586ae39b9620422d247df536cee851
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
lpm_rom1:inst2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(50).cnf
db|FFT.(50).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
5
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
32
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
CLEAR0
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
INIT_FILE
WN_isin.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_qq71
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a
-1
3
clock0
-1
3
address_a
-1
3
aclr0
-1
3
wren_b
-1
1
wren_a
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
rden_b
-1
2
rden_a
-1
2
data_b
-1
2
data_a
-1
2
clocken3
-1
2
clocken2
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
lpm_rom1:inst2|altsyncram:altsyncram_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_qq71
# storage
db|FFT.(51).cnf
db|FFT.(51).cnf
# case_insensitive
# source_file
db|altsyncram_qq71.tdf
c9f170f9c5bb11f1d57b92967a613764
6
# used_port {
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
aclr0
-1
3
}
# memory_file {
WN_isin.mif
34339c31975bc616802c433fe3b838e
}
# hierarchies {
lpm_rom1:inst2|altsyncram:altsyncram_component|altsyncram_qq71:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_rom0
# storage
db|FFT.(52).cnf
db|FFT.(52).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_rom0.v
c9dcee7a9234204025761cca2648c731
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
lpm_rom0:inst1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(53).cnf
db|FFT.(53).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
5
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
32
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
CLEAR0
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
INIT_FILE
../FFT last edition/WN_rcos.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_oh91
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a
-1
3
clock0
-1
3
address_a
-1
3
aclr0
-1
3
wren_b
-1
1
wren_a
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
rden_b
-1
2
rden_a
-1
2
data_b
-1
2
data_a
-1
2
clocken3
-1
2
clocken2
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
lpm_rom0:inst1|altsyncram:altsyncram_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_oh91
# storage
db|FFT.(54).cnf
db|FFT.(54).cnf
# case_insensitive
# source_file
db|altsyncram_oh91.tdf
856cae9ceaff060c5659e6bf2f17fb2
6
# used_port {
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
aclr0
-1
3
}
# memory_file {
..|FFT last edition|WN_rcos.mif
57dd44ba878cabf57c2559df41a2bd4
}
# hierarchies {
lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_oh91:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
makeup_sign
# storage
db|FFT.(55).cnf
db|FFT.(55).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
makeup_sign.v
30642575eb2e62fd2aa8bfaae0c5d425
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
makeup_sign:inst32
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(57).cnf
db|FFT.(57).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
6
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
64
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
INIT_FILE
sin.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_qp61
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a
-1
3
clock0
-1
3
address_a
-1
3
wren_b
-1
1
wren_a
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
aclr0
-1
1
rden_b
-1
2
rden_a
-1
2
data_b
-1
2
data_a
-1
2
clocken3
-1
2
clocken2
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_qp61
# storage
db|FFT.(58).cnf
db|FFT.(58).cnf
# case_insensitive
# source_file
db|altsyncram_qp61.tdf
65a22569ffbcdb7a85ee184d4c2717
6
# used_port {
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
sin.mif
c5c979b3efb81ae5d23ea0bc478d2155
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter0
# storage
db|FFT.(59).cnf
db|FFT.(59).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_counter0.v
8541a424cf16da2720e0383d10a5108
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
lpm_counter0:inst4
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(60).cnf
db|FFT.(60).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
6
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_UNUSED
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_qkh
PARAMETER_UNKNOWN
USR
}
# used_port {
q
-1
3
clock
-1
3
sset
-1
1
sload
-1
1
sclr
-1
1
data
-1
1
aset
-1
1
aload
-1
1
aclr
-1
1
updown
-1
2
cnt_en
-1
2
clk_en
-1
2
cin
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# hierarchies {
lpm_counter0:inst4|lpm_counter:lpm_counter_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_qkh
# storage
db|FFT.(61).cnf
db|FFT.(61).cnf
# case_insensitive
# source_file
db|cntr_qkh.tdf
461dd026f9234f7bc559b04616f6a7
6
# used_port {
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
}
# hierarchies {
lpm_counter0:inst4|lpm_counter:lpm_counter_component|cntr_qkh:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
block_new
# storage
db|FFT.(62).cnf
db|FFT.(62).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
block_new.v
88701665ee4913441e0986574b13c71
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
s0
00
PARAMETER_UNSIGNED_BIN
USR
s1
01
PARAMETER_UNSIGNED_BIN
USR
s2
10
PARAMETER_UNSIGNED_BIN
USR
scale
01000000
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
block_new:inst45
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altshift_taps
# storage
db|FFT.(63).cnf
db|FFT.(63).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altshift_taps.tdf
f863aaf7dd9360df21e15956265bdcaa
6
# user_parameter {
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
NUMBER_OF_TAPS
1
PARAMETER_UNKNOWN
USR
TAP_DISTANCE
3
PARAMETER_UNKNOWN
USR
WIDTH
34
PARAMETER_UNKNOWN
USR
POWER_UP_STATE
CLEARED
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
shift_taps_5hp
PARAMETER_UNKNOWN
USR
}
# used_port {
taps9
-1
3
taps8
-1
3
taps7
-1
3
taps6
-1
3
taps5
-1
3
taps4
-1
3
taps33
-1
3
taps32
-1
3
taps31
-1
3
taps30
-1
3
taps3
-1
3
taps29
-1
3
taps28
-1
3
taps27
-1
3
taps26
-1
3
taps25
-1
3
taps24
-1
3
taps23
-1
3
taps22
-1
3
taps21
-1
3
taps20
-1
3
taps2
-1
3
taps19
-1
3
taps18
-1
3
taps17
-1
3
taps16
-1
3
taps15
-1
3
taps14
-1
3
taps13
-1
3
taps12
-1
3
taps11
-1
3
taps10
-1
3
taps1
-1
3
taps0
-1
3
shiftin9
-1
3
shiftin8
-1
3
shiftin7
-1
3
shiftin6
-1
3
shiftin5
-1
3
shiftin4
-1
3
shiftin33
-1
3
shiftin32
-1
3
shiftin31
-1
3
shiftin30
-1
3
shiftin3
-1
3
shiftin29
-1
3
shiftin28
-1
3
shiftin27
-1
3
shiftin26
-1
3
shiftin25
-1
3
shiftin24
-1
3
shiftin23
-1
3
shiftin22
-1
3
shiftin21
-1
3
shiftin20
-1
3
shiftin2
-1
3
shiftin19
-1
3
shiftin18
-1
3
shiftin17
-1
3
shiftin16
-1
3
shiftin15
-1
3
shiftin14
-1
3
shiftin13
-1
3
shiftin12
-1
3
shiftin11
-1
3
shiftin10
-1
3
shiftin1
-1
3
shiftin0
-1
3
clock
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
shift_taps_5hp
# storage
db|FFT.(64).cnf
db|FFT.(64).cnf
# case_insensitive
# source_file
db|shift_taps_5hp.tdf
4deece26afe3ecc9445076bbc269ee4d
6
# used_port {
taps9
-1
3
taps8
-1
3
taps7
-1
3
taps6
-1
3
taps5
-1
3
taps4
-1
3
taps33
-1
3
taps32
-1
3
taps31
-1
3
taps30
-1
3
taps3
-1
3
taps29
-1
3
taps28
-1
3
taps27
-1
3
taps26
-1
3
taps25
-1
3
taps24
-1
3
taps23
-1
3
taps22
-1
3
taps21
-1
3
taps20
-1
3
taps2
-1
3
taps19
-1
3
taps18
-1
3
taps17
-1
3
taps16
-1
3
taps15
-1
3
taps14
-1
3
taps13
-1
3
taps12
-1
3
taps11
-1
3
taps10
-1
3
taps1
-1
3
taps0
-1
3
shiftin9
-1
3
shiftin8
-1
3
shiftin7
-1
3
shiftin6
-1
3
shiftin5
-1
3
shiftin4
-1
3
shiftin33
-1
3
shiftin32
-1
3
shiftin31
-1
3
shiftin30
-1
3
shiftin3
-1
3
shiftin29
-1
3
shiftin28
-1
3
shiftin27
-1
3
shiftin26
-1
3
shiftin25
-1
3
shiftin24
-1
3
shiftin23
-1
3
shiftin22
-1
3
shiftin21
-1
3
shiftin20
-1
3
shiftin2
-1
3
shiftin19
-1
3
shiftin18
-1
3
shiftin17
-1
3
shiftin16
-1
3
shiftin15
-1
3
shiftin14
-1
3
shiftin13
-1
3
shiftin12
-1
3
shiftin11
-1
3
shiftin10
-1
3
shiftin1
-1
3
shiftin0
-1
3
clock
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_hg31
# storage
db|FFT.(65).cnf
db|FFT.(65).cnf
# case_insensitive
# source_file
db|altsyncram_hg31.tdf
17dd42f3c0e7bc572a98fcf9c128c2d
6
# used_port {
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b5
-1
3
q_b4
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
3
data_a4
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clock1
-1
3
clock0
-1
3
address_b1
-1
3
address_b0
-1
3
address_a1
-1
3
address_a0
-1
3
wren_a
-1
2
clocken1
-1
2
clocken0
-1
2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_gvd
# storage
db|FFT.(66).cnf
db|FFT.(66).cnf
# case_insensitive
# source_file
db|add_sub_gvd.tdf
68db27e8dee2e81684f3c014ab4938fb
6
# used_port {
result1
-1
3
result0
-1
3
dataa1
-1
3
dataa0
-1
3
datab1
-1
1
datab0
-1
1
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_kkf
# storage
db|FFT.(67).cnf
db|FFT.(67).cnf
# case_insensitive
# source_file
db|cntr_kkf.tdf
ebe8ead5e71f77022c163d20d530
6
# used_port {
q1
-1
3
q0
-1
3
clock
-1
3
clk_en
-1
2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
reset_ctrl
# storage
db|FFT.(68).cnf
db|FFT.(68).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
reset_ctrl.vhd
533462712d67ba371127f32daa130e0
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
const
2
PARAMETER_UNKNOWN
USR
}
# hierarchies {
reset_ctrl:inst5
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(69).cnf
db|FFT.(69).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
55
PARAMETER_UNKNOWN
USR
sld_trigger_bits
55
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
3011
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
5091
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
128
PARAMETER_UNKNOWN
USR
sld_segment_size
128
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
2
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
0
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
176
PARAMETER_UNKNOWN
USR
sld_inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
PARAMETER_UNKNOWN
USR
sld_state_flow_use_generated
1
PARAMETER_UNKNOWN
USR
sld_current_resource_width
0
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(70).cnf
db|FFT.(70).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
55
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
55
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
3011
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
5091
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
128
PARAMETER_SIGNED_DEC
USR
sld_segment_size
128
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
2
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
0
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
176
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
PARAMETER_STRING
USR
sld_state_flow_use_generated
1
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
0
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
54 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(71).cnf
db|FFT.(71).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
55
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
sample_depth
128
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
2
PARAMETER_SIGNED_DEC
USR
segment_size_bits
7
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
PARAMETER_STRING
USR
state_flow_use_generated
1
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
6 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
1 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(72).cnf
db|FFT.(72).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
4
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|FFT.(73).cnf
db|FFT.(73).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
55
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(74).cnf
db|FFT.(74).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
165
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q99
-1
3
Q98
-1
3
Q97
-1
3
Q96
-1
3
Q95
-1
3
Q94
-1
3
Q93
-1
3
Q92
-1
3
Q91
-1
3
Q90
-1
3
Q9
-1
3
Q89
-1
3
Q88
-1
3
Q87
-1
3
Q86
-1
3
Q85
-1
3
Q84
-1
3
Q83
-1
3
Q82
-1
3
Q81
-1
3
Q80
-1
3
Q8
-1
3
Q79
-1
3
Q78
-1
3
Q77
-1
3
Q76
-1
3
Q75
-1
3
Q74
-1
3
Q73
-1
3
Q72
-1
3
Q71
-1
3
Q70
-1
3
Q7
-1
3
Q69
-1
3
Q68
-1
3
Q67
-1
3
Q66
-1
3
Q65
-1
3
Q64
-1
3
Q63
-1
3
Q62
-1
3
Q61
-1
3
Q60
-1
3
Q6
-1
3
Q59
-1
3
Q58
-1
3
Q57
-1
3
Q56
-1
3
Q55
-1
3
Q54
-1
3
Q53
-1
3
Q52
-1
3
Q51
-1
3
Q50
-1
3
Q5
-1
3
Q49
-1
3
Q48
-1
3
Q47
-1
3
Q46
-1
3
Q45
-1
3
Q44
-1
3
Q43
-1
3
Q42
-1
3
Q41
-1
3
Q40
-1
3
Q4
-1
3
Q39
-1
3
Q38
-1
3
Q37
-1
3
Q36
-1
3
Q35
-1
3
Q34
-1
3
Q33
-1
3
Q32
-1
3
Q31
-1
3
Q30
-1
3
Q3
-1
3
Q29
-1
3
Q28
-1
3
Q27
-1
3
Q26
-1
3
Q25
-1
3
Q24
-1
3
Q23
-1
3
Q22
-1
3
Q21
-1
3
Q20
-1
3
Q2
-1
3
Q19
-1
3
Q18
-1
3
Q17
-1
3
Q164
-1
3
Q163
-1
3
Q162
-1
3
Q161
-1
3
Q160
-1
3
Q16
-1
3
Q159
-1
3
Q158
-1
3
Q157
-1
3
Q156
-1
3
Q155
-1
3
Q154
-1
3
Q153
-1
3
Q152
-1
3
Q151
-1
3
Q150
-1
3
Q15
-1
3
Q149
-1
3
Q148
-1
3
Q147
-1
3
Q146
-1
3
Q145
-1
3
Q144
-1
3
Q143
-1
3
Q142
-1
3
Q141
-1
3
Q140
-1
3
Q14
-1
3
Q139
-1
3
Q138
-1
3
Q137
-1
3
Q136
-1
3
Q135
-1
3
Q134
-1
3
Q133
-1
3
Q132
-1
3
Q131
-1
3
Q130
-1
3
Q13
-1
3
Q129
-1
3
Q128
-1
3
Q127
-1
3
Q126
-1
3
Q125
-1
3
Q124
-1
3
Q123
-1
3
Q122
-1
3
Q121
-1
3
Q120
-1
3
Q12
-1
3
Q119
-1
3
Q118
-1
3
Q117
-1
3
Q116
-1
3
Q115
-1
3
Q114
-1
3
Q113
-1
3
Q112
-1
3
Q111
-1
3
Q110
-1
3
Q11
-1
3
Q109
-1
3
Q108
-1
3
Q107
-1
3
Q106
-1
3
Q105
-1
3
Q104
-1
3
Q103
-1
3
Q102
-1
3
Q101
-1
3
Q100
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_mbpmg
# storage
db|FFT.(75).cnf
db|FFT.(75).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_mbpmg.vhd
dd6bdbbc4a40c39f4a6122a4ef6a95
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
data_bits
55
PARAMETER_SIGNED_DEC
USR
pattern_bits
3
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
sync_enabled
1
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(pattern_in)
164 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_sbpmg
# storage
db|FFT.(76).cnf
db|FFT.(76).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_mbpmg.vhd
dd6bdbbc4a40c39f4a6122a4ef6a95
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_mbpmg
# storage
db|FFT.(77).cnf
db|FFT.(77).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_mbpmg.vhd
dd6bdbbc4a40c39f4a6122a4ef6a95
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
data_bits
1
PARAMETER_SIGNED_DEC
USR
pattern_bits
3
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
sync_enabled
1
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
DEF
 constraint(data_in)
0 downto 0
PARAMETER_STRING
USR
 constraint(pattern_in)
2 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_sel
# storage
db|FFT.(78).cnf
db|FFT.(78).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_trigger_flow_sel.tdf
261da9e774cf22e3b869bfd3860de3b
6
# user_parameter {
CONDITION_WIDTH
1
PARAMETER_SIGNED_DEC
USR
POST_FILL_COUNT_WIDTH
7
PARAMETER_SIGNED_DEC
USR
RESOURCE_WIDTH
1
PARAMETER_SIGNED_DEC
USR
STATE_WIDTH
2
PARAMETER_SIGNED_DEC
USR
TRIGGER_FLOW_ENTITY_NAME
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
sld_ela_trigger_flow_sel_q631
PARAMETER_UNKNOWN
USR
}
# used_port {
use_post_fill_count
-1
3
start_acq
-1
3
segment_trigger
-1
3
reset
-1
3
post_fill_count6
-1
3
post_fill_count5
-1
3
post_fill_count4
-1
3
post_fill_count3
-1
3
post_fill_count2
-1
3
post_fill_count1
-1
3
post_fill_count0
-1
3
final_trigger
-1
3
current_state1
-1
3
current_state0
-1
3
current_resource_value0
-1
3
config_out
-1
3
config_in
-1
3
config_enable
-1
3
config_clk
-1
3
condition_met0
-1
3
acq_clk
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_ela_trigger_flow_sel_q631
# storage
db|FFT.(79).cnf
db|FFT.(79).cnf
# case_insensitive
# source_file
db|sld_ela_trigger_flow_sel_q631.tdf
61d60461d61e21ac332f5cdfcb378ee
6
# used_port {
use_post_fill_count
-1
3
start_acq
-1
3
segment_trigger
-1
3
reset
-1
3
post_fill_count6
-1
3
post_fill_count5
-1
3
post_fill_count4
-1
3
post_fill_count3
-1
3
post_fill_count2
-1
3
post_fill_count1
-1
3
post_fill_count0
-1
3
final_trigger
-1
3
current_state1
-1
3
current_state0
-1
3
current_resource_value0
-1
3
config_out
-1
3
config_in
-1
3
config_enable
-1
3
config_clk
-1
3
condition_met0
-1
3
acq_clk
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_buffer_manager
# storage
db|FFT.(81).cnf
db|FFT.(81).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
address_bits
7
PARAMETER_SIGNED_DEC
USR
segment_size_bits
7
PARAMETER_SIGNED_DEC
USR
num_segments_bits
1
PARAMETER_SIGNED_DEC
USR
 constraint(address)
6 downto 0
PARAMETER_STRING
USR
 constraint(post_count)
6 downto 0
PARAMETER_STRING
USR
 constraint(current_segment)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_offset)
6 downto 0
PARAMETER_STRING
USR
 constraint(last_trigger_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
6 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(82).cnf
db|FFT.(82).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
7
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(83).cnf
db|FFT.(83).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
55
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
7
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
0
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
55
PARAMETER_SIGNED_DEC
USR
WIDTHAD_B
7
PARAMETER_SIGNED_DEC
USR
NUMWORDS_B
0
PARAMETER_SIGNED_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_SIGNED_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_SIGNED_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_u4p3
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_u4p3
# storage
db|FFT.(84).cnf
db|FFT.(84).cnf
# case_insensitive
# source_file
db|altsyncram_u4p3.tdf
3864c493f67be42bb38fc0a3fb7b73fb
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altdpram
# storage
db|FFT.(85).cnf
db|FFT.(85).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altdpram.tdf
713216b488e19857e19773cf6d8f34e
6
# user_parameter {
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
WIDTH
15
PARAMETER_SIGNED_DEC
USR
WIDTHAD
1
PARAMETER_SIGNED_DEC
USR
NUMWORDS
0
PARAMETER_SIGNED_DEC
USR
FILE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INDATA_REG
INCLOCK
PARAMETER_UNKNOWN
USR
INDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRADDRESS_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRCONTROL_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDADDRESS_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
RDADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDCONTROL_REG
UNREGISTERED
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
OUTDATA_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
USE_EAB
OFF
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
SUPPRESS_MEMORY_CONVERSION_WARNINGS
OFF
PARAMETER_UNKNOWN
DEF
INTENDED_DEVICE_FAMILY
APEX20KE
PARAMETER_UNKNOWN
DEF
ENABLE_RAM_BENCHMARKING_MODE
OFF
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
DISABLE_LE_RAM_LIMIT_CHECK
on
PARAMETER_UNKNOWN
USR
BYTE_SIZE
0
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA
1
PARAMETER_SIGNED_DEC
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
wren
-1
3
wraddress0
-1
3
rdaddress0
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
outclocken
-1
3
outclock
-1
3
inclocken
-1
3
inclock
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
e:|altera|72|quartus|libraries|megafunctions|altsyncram.inc
1b5760dd55919ddb45bfb2c0e896218b
e:|altera|72|quartus|libraries|others|maxplus2|memmodes.inc
44d4551a35f349f0dbacaf799d39950
e:|altera|72|quartus|libraries|megafunctions|a_hdffe.inc
6e1dd1dda0dcf1122cd2b84d66c10b3
e:|altera|72|quartus|libraries|megafunctions|alt_le_rden_reg.inc
7591066e9fa6e1ee16e5ba18b60506f
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_mux
# storage
db|FFT.(86).cnf
db|FFT.(86).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.tdf
58f75cf5c2963ffeb4ea39e4a91f8e4
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
15
PARAMETER_UNKNOWN
USR
LPM_SIZE
2
PARAMETER_UNKNOWN
USR
LPM_WIDTHS
1
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mux_aoc
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
}
# used_port {
sel0
-1
3
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data1_9
-1
3
data1_8
-1
3
data1_7
-1
3
data1_6
-1
3
data1_5
-1
3
data1_4
-1
3
data1_3
-1
3
data1_2
-1
3
data1_14
-1
3
data1_13
-1
3
data1_12
-1
3
data1_11
-1
3
data1_10
-1
3
data1_1
-1
3
data1_0
-1
3
data0_9
-1
3
data0_8
-1
3
data0_7
-1
3
data0_6
-1
3
data0_5
-1
3
data0_4
-1
3
data0_3
-1
3
data0_2
-1
3
data0_14
-1
3
data0_13
-1
3
data0_12
-1
3
data0_11
-1
3
data0_10
-1
3
data0_1
-1
3
data0_0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|muxlut.inc
f172666ca13e5e31e17e3f6cb35af52
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
mux_aoc
# storage
db|FFT.(87).cnf
db|FFT.(87).cnf
# case_insensitive
# source_file
db|mux_aoc.tdf
9215b179b22e7f9d79de289167e82bb
6
# used_port {
sel0
-1
3
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data29
-1
3
data28
-1
3
data27
-1
3
data26
-1
3
data25
-1
3
data24
-1
3
data23
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_decode
# storage
db|FFT.(88).cnf
db|FFT.(88).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.tdf
e54fe7084974ccb962d679caa84bdd
6
# user_parameter {
LPM_WIDTH
1
PARAMETER_UNKNOWN
USR
LPM_DECODES
2
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_rqf
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
eq1
-1
3
eq0
-1
3
enable
-1
3
data0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|declut.inc
b1d5939399e5c04dfe1d209af8cc490
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
decode_rqf
# storage
db|FFT.(89).cnf
db|FFT.(89).cnf
# case_insensitive
# source_file
db|decode_rqf.tdf
f766b97727e655c34afa5885f8a244a
6
# used_port {
eq1
-1
3
eq0
-1
3
enable
-1
3
data0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_offload_buffer_mgr
# storage
db|FFT.(90).cnf
db|FFT.(90).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
buffer_depth
128
PARAMETER_SIGNED_DEC
USR
segment_count
1
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
status_address_bits
1
PARAMETER_SIGNED_DEC
USR
data_bits
55
PARAMETER_SIGNED_DEC
USR
status_bits
15
PARAMETER_SIGNED_DEC
USR
data_bit_cntr_bits
6
PARAMETER_SIGNED_DEC
USR
status_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(buffer_read_data_out)
54 downto 0
PARAMETER_STRING
USR
 constraint(status_read_data_out)
14 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(buffer_read_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(status_read_address)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(91).cnf
db|FFT.(91).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
6
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
55
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_gbi
PARAMETER_UNKNOWN
USR
}
# used_port {
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_gbi
# storage
db|FFT.(92).cnf
db|FFT.(92).cnf
# case_insensitive
# source_file
db|cntr_gbi.tdf
5b7df15a8a47a21f1e65616eec6332
6
# used_port {
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(93).cnf
db|FFT.(93).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
7
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
128
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_e1j
PARAMETER_UNKNOWN
USR
}
# used_port {
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
CLK_EN
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_e1j
# storage
db|FFT.(94).cnf
db|FFT.(94).cnf
# case_insensitive
# source_file
db|cntr_e1j.tdf
0f5146852e1e3ff987a6702bdaf92
6
# used_port {
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
clk_en
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(95).cnf
db|FFT.(95).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
55
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA54
-1
3
DATA53
-1
3
DATA52
-1
3
DATA51
-1
3
DATA50
-1
3
DATA5
-1
3
DATA49
-1
3
DATA48
-1
3
DATA47
-1
3
DATA46
-1
3
DATA45
-1
3
DATA44
-1
3
DATA43
-1
3
DATA42
-1
3
DATA41
-1
3
DATA40
-1
3
DATA4
-1
3
DATA39
-1
3
DATA38
-1
3
DATA37
-1
3
DATA36
-1
3
DATA35
-1
3
DATA34
-1
3
DATA33
-1
3
DATA32
-1
3
DATA31
-1
3
DATA30
-1
3
DATA3
-1
3
DATA29
-1
3
DATA28
-1
3
DATA27
-1
3
DATA26
-1
3
DATA25
-1
3
DATA24
-1
3
DATA23
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
SHIFTIN
-1
2
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(96).cnf
db|FFT.(96).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
15
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA2
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(97).cnf
db|FFT.(97).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
15
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_abi
PARAMETER_UNKNOWN
USR
}
# used_port {
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_abi
# storage
db|FFT.(98).cnf
db|FFT.(98).cnf
# case_insensitive
# source_file
db|cntr_abi.tdf
d49952de479e4b9c0474a7bb7471a31
6
# used_port {
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(99).cnf
db|FFT.(99).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
1
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
1
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_uti
PARAMETER_UNKNOWN
USR
}
# used_port {
Q0
-1
3
CLOCK
-1
3
CLK_EN
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_uti
# storage
db|FFT.(100).cnf
db|FFT.(100).cnf
# case_insensitive
# source_file
db|cntr_uti.tdf
707c6c9d77a2aa30164853da2ebc6862
6
# used_port {
q0
-1
3
clock
-1
3
clk_en
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(101).cnf
db|FFT.(101).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
15
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA2
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
SHIFTIN
-1
2
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_rom_sr
# storage
db|FFT.(102).cnf
db|FFT.(102).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_rom_sr.vhd
289c5d86b3cfff8b4a53596c88b2f9be
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
n_bits
32
PARAMETER_SIGNED_DEC
USR
word_size
4
PARAMETER_SIGNED_DEC
USR
 constraint(rom_data)
31 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(103).cnf
db|FFT.(103).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
7
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
LOAD
-1
3
ENABLE
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA2
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
DATA3
-1
1
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_hub
# storage
db|FFT.(104).cnf
db|FFT.(104).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_hub.vhd
6e9e745e59c7027e95e782bf1f2fa1
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
3
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone II
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
8
PARAMETER_UNKNOWN
USR
node_info
00110000000000000110111000000000
PARAMETER_UNSIGNED_BIN
USR
compilation_mode
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_jtag_state_machine
# storage
db|FFT.(105).cnf
db|FFT.(105).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_hub.vhd
6e9e745e59c7027e95e782bf1f2fa1
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
1
PARAMETER_SIGNED_DEC
USR
ip_minor_version
3
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
 constraint(jtag_state)
15 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(106).cnf
db|FFT.(106).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_decode
# storage
db|FFT.(107).cnf
db|FFT.(107).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.tdf
e54fe7084974ccb962d679caa84bdd
6
# user_parameter {
LPM_WIDTH
3
PARAMETER_SIGNED_DEC
USR
LPM_DECODES
8
PARAMETER_SIGNED_DEC
USR
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_aoi
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
eq7
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|declut.inc
b1d5939399e5c04dfe1d209af8cc490
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
decode_aoi
# storage
db|FFT.(108).cnf
db|FFT.(108).cnf
# case_insensitive
# source_file
db|decode_aoi.tdf
27acb647f9c1d82ff6f81bf65afeb
6
# used_port {
eq7
-1
3
eq6
-1
3
eq5
-1
3
eq4
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_dffex
# storage
db|FFT.(109).cnf
db|FFT.(109).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
1
PARAMETER_SIGNED_DEC
USR
 constraint(d)
0 downto 0
PARAMETER_STRING
USR
 constraint(q)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_dffex
# storage
db|FFT.(110).cnf
db|FFT.(110).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
9
PARAMETER_SIGNED_DEC
USR
 constraint(d)
8 downto 0
PARAMETER_STRING
USR
 constraint(q)
8 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_dffex
# storage
db|FFT.(111).cnf
db|FFT.(111).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
8
PARAMETER_SIGNED_DEC
USR
 constraint(d)
7 downto 0
PARAMETER_STRING
USR
 constraint(q)
7 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_rom_sr
# storage
db|FFT.(112).cnf
db|FFT.(112).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_rom_sr.vhd
289c5d86b3cfff8b4a53596c88b2f9be
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
n_bits
64
PARAMETER_SIGNED_DEC
USR
word_size
4
PARAMETER_SIGNED_DEC
USR
 constraint(rom_data)
63 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(80).cnf
db|FFT.(80).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
55
PARAMETER_UNKNOWN
USR
sld_trigger_bits
55
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
11687
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
5091
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
128
PARAMETER_UNKNOWN
USR
sld_segment_size
128
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
2
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
0
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
176
PARAMETER_UNKNOWN
USR
sld_inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
PARAMETER_UNKNOWN
USR
sld_state_flow_use_generated
1
PARAMETER_UNKNOWN
USR
sld_current_resource_width
0
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(113).cnf
db|FFT.(113).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
55
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
55
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
11687
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
5091
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
128
PARAMETER_SIGNED_DEC
USR
sld_segment_size
128
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
2
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
0
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
176
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
PARAMETER_STRING
USR
sld_state_flow_use_generated
1
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
0
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
54 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a
# storage
db|FFT.(114).cnf
db|FFT.(114).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
db|sld_reserved_FFT_auto_signaltap_0_flow_mgr_1f2a.v
f474f413bd83dd5673da4dbe15a84ed
7
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(115).cnf
db|FFT.(115).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
55
PARAMETER_UNKNOWN
USR
sld_trigger_bits
55
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
24177
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
5091
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
128
PARAMETER_UNKNOWN
USR
sld_segment_size
128
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
186
PARAMETER_UNKNOWN
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(116).cnf
db|FFT.(116).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
55
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
55
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
24177
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
5091
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
128
PARAMETER_SIGNED_DEC
USR
sld_segment_size
128
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
186
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
54 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(117).cnf
db|FFT.(117).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
55
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
sample_depth
128
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
7
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
6 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_mgr
# storage
db|FFT.(118).cnf
db|FFT.(118).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_trigger_flow_mgr.vhd
3dbadd99fe363e4212223c9431c028a9
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
segment_size_bits
7
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
 constraint(condition_met)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
6 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(119).cnf
db|FFT.(119).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(120).cnf
db|FFT.(120).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
17
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
LOAD
-1
3
ENABLE
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA2
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
DATA3
-1
1
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(121).cnf
db|FFT.(121).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
44418
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
12750
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
128
PARAMETER_UNKNOWN
USR
sld_segment_size
128
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
189
PARAMETER_UNKNOWN
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(122).cnf
db|FFT.(122).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
44418
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
12750
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
128
PARAMETER_SIGNED_DEC
USR
sld_segment_size
128
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
189
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(123).cnf
db|FFT.(123).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
56
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
sample_depth
128
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
7
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
6 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|FFT.(124).cnf
db|FFT.(124).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
56
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(125).cnf
db|FFT.(125).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
168
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q99
-1
3
Q98
-1
3
Q97
-1
3
Q96
-1
3
Q95
-1
3
Q94
-1
3
Q93
-1
3
Q92
-1
3
Q91
-1
3
Q90
-1
3
Q9
-1
3
Q89
-1
3
Q88
-1
3
Q87
-1
3
Q86
-1
3
Q85
-1
3
Q84
-1
3
Q83
-1
3
Q82
-1
3
Q81
-1
3
Q80
-1
3
Q8
-1
3
Q79
-1
3
Q78
-1
3
Q77
-1
3
Q76
-1
3
Q75
-1
3
Q74
-1
3
Q73
-1
3
Q72
-1
3
Q71
-1
3
Q70
-1
3
Q7
-1
3
Q69
-1
3
Q68
-1
3
Q67
-1
3
Q66
-1
3
Q65
-1
3
Q64
-1
3
Q63
-1
3
Q62
-1
3
Q61
-1
3
Q60
-1
3
Q6
-1
3
Q59
-1
3
Q58
-1
3
Q57
-1
3
Q56
-1
3
Q55
-1
3
Q54
-1
3
Q53
-1
3
Q52
-1
3
Q51
-1
3
Q50
-1
3
Q5
-1
3
Q49
-1
3
Q48
-1
3
Q47
-1
3
Q46
-1
3
Q45
-1
3
Q44
-1
3
Q43
-1
3
Q42
-1
3
Q41
-1
3
Q40
-1
3
Q4
-1
3
Q39
-1
3
Q38
-1
3
Q37
-1
3
Q36
-1
3
Q35
-1
3
Q34
-1
3
Q33
-1
3
Q32
-1
3
Q31
-1
3
Q30
-1
3
Q3
-1
3
Q29
-1
3
Q28
-1
3
Q27
-1
3
Q26
-1
3
Q25
-1
3
Q24
-1
3
Q23
-1
3
Q22
-1
3
Q21
-1
3
Q20
-1
3
Q2
-1
3
Q19
-1
3
Q18
-1
3
Q17
-1
3
Q167
-1
3
Q166
-1
3
Q165
-1
3
Q164
-1
3
Q163
-1
3
Q162
-1
3
Q161
-1
3
Q160
-1
3
Q16
-1
3
Q159
-1
3
Q158
-1
3
Q157
-1
3
Q156
-1
3
Q155
-1
3
Q154
-1
3
Q153
-1
3
Q152
-1
3
Q151
-1
3
Q150
-1
3
Q15
-1
3
Q149
-1
3
Q148
-1
3
Q147
-1
3
Q146
-1
3
Q145
-1
3
Q144
-1
3
Q143
-1
3
Q142
-1
3
Q141
-1
3
Q140
-1
3
Q14
-1
3
Q139
-1
3
Q138
-1
3
Q137
-1
3
Q136
-1
3
Q135
-1
3
Q134
-1
3
Q133
-1
3
Q132
-1
3
Q131
-1
3
Q130
-1
3
Q13
-1
3
Q129
-1
3
Q128
-1
3
Q127
-1
3
Q126
-1
3
Q125
-1
3
Q124
-1
3
Q123
-1
3
Q122
-1
3
Q121
-1
3
Q120
-1
3
Q12
-1
3
Q119
-1
3
Q118
-1
3
Q117
-1
3
Q116
-1
3
Q115
-1
3
Q114
-1
3
Q113
-1
3
Q112
-1
3
Q111
-1
3
Q110
-1
3
Q11
-1
3
Q109
-1
3
Q108
-1
3
Q107
-1
3
Q106
-1
3
Q105
-1
3
Q104
-1
3
Q103
-1
3
Q102
-1
3
Q101
-1
3
Q100
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_mbpmg
# storage
db|FFT.(126).cnf
db|FFT.(126).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_mbpmg.vhd
dd6bdbbc4a40c39f4a6122a4ef6a95
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
data_bits
56
PARAMETER_SIGNED_DEC
USR
pattern_bits
3
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
sync_enabled
1
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(pattern_in)
167 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(127).cnf
db|FFT.(127).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
56
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
7
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
0
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
56
PARAMETER_SIGNED_DEC
USR
WIDTHAD_B
7
PARAMETER_SIGNED_DEC
USR
NUMWORDS_B
0
PARAMETER_SIGNED_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_SIGNED_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_SIGNED_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_05p3
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b55
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a55
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_05p3
# storage
db|FFT.(128).cnf
db|FFT.(128).cnf
# case_insensitive
# source_file
db|altsyncram_05p3.tdf
a4439f8c2c654ec648b6659b732af64
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b55
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a55
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_offload_buffer_mgr
# storage
db|FFT.(129).cnf
db|FFT.(129).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
buffer_depth
128
PARAMETER_SIGNED_DEC
USR
segment_count
1
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
status_address_bits
1
PARAMETER_SIGNED_DEC
USR
data_bits
56
PARAMETER_SIGNED_DEC
USR
status_bits
15
PARAMETER_SIGNED_DEC
USR
data_bit_cntr_bits
6
PARAMETER_SIGNED_DEC
USR
status_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(buffer_read_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(status_read_data_out)
14 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(buffer_read_address)
6 downto 0
PARAMETER_STRING
USR
 constraint(status_read_address)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(130).cnf
db|FFT.(130).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
6
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
56
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_hbi
PARAMETER_UNKNOWN
USR
}
# used_port {
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_hbi
# storage
db|FFT.(131).cnf
db|FFT.(131).cnf
# case_insensitive
# source_file
db|cntr_hbi.tdf
ee4874422142a3c348062754992ead9
6
# used_port {
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(132).cnf
db|FFT.(132).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
56
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA55
-1
3
DATA54
-1
3
DATA53
-1
3
DATA52
-1
3
DATA51
-1
3
DATA50
-1
3
DATA5
-1
3
DATA49
-1
3
DATA48
-1
3
DATA47
-1
3
DATA46
-1
3
DATA45
-1
3
DATA44
-1
3
DATA43
-1
3
DATA42
-1
3
DATA41
-1
3
DATA40
-1
3
DATA4
-1
3
DATA39
-1
3
DATA38
-1
3
DATA37
-1
3
DATA36
-1
3
DATA35
-1
3
DATA34
-1
3
DATA33
-1
3
DATA32
-1
3
DATA31
-1
3
DATA30
-1
3
DATA3
-1
3
DATA29
-1
3
DATA28
-1
3
DATA27
-1
3
DATA26
-1
3
DATA25
-1
3
DATA24
-1
3
DATA23
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
SHIFTIN
-1
2
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(133).cnf
db|FFT.(133).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
55
PARAMETER_UNKNOWN
USR
sld_trigger_bits
55
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
46356
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
5091
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
190
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000111011111111
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
1
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(134).cnf
db|FFT.(134).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
55
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
55
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
46356
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
5091
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
190
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000111011111111
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
54 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
54 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(135).cnf
db|FFT.(135).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
55
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
sample_depth
2048
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
179
PARAMETER_SIGNED_DEC
USR
inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|FFT.(136).cnf
db|FFT.(136).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
55
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
179
PARAMETER_SIGNED_DEC
USR
inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
54 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_mgr
# storage
db|FFT.(137).cnf
db|FFT.(137).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_trigger_flow_mgr.vhd
3dbadd99fe363e4212223c9431c028a9
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
175
PARAMETER_SIGNED_DEC
USR
inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
PARAMETER_UNSIGNED_BIN
USR
 constraint(condition_met)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_buffer_manager
# storage
db|FFT.(138).cnf
db|FFT.(138).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
address_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
num_segments_bits
1
PARAMETER_SIGNED_DEC
USR
 constraint(address)
10 downto 0
PARAMETER_STRING
USR
 constraint(post_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_segment)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_offset)
10 downto 0
PARAMETER_STRING
USR
 constraint(last_trigger_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
10 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(139).cnf
db|FFT.(139).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
11
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q9
-1
3
Q8
-1
3
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(140).cnf
db|FFT.(140).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
55
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
11
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
0
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
55
PARAMETER_SIGNED_DEC
USR
WIDTHAD_B
11
PARAMETER_SIGNED_DEC
USR
NUMWORDS_B
0
PARAMETER_SIGNED_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_SIGNED_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_SIGNED_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_k7p3
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_k7p3
# storage
db|FFT.(141).cnf
db|FFT.(141).cnf
# case_insensitive
# source_file
db|altsyncram_k7p3.tdf
41c89434a192908b2dedff319356c
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_0hq1
# storage
db|FFT.(142).cnf
db|FFT.(142).cnf
# case_insensitive
# source_file
db|altsyncram_0hq1.tdf
55c712d05664b2cda2d35c72489fa93
6
# used_port {
wren_b
-1
3
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a54
-1
3
q_a53
-1
3
q_a52
-1
3
q_a51
-1
3
q_a50
-1
3
q_a5
-1
3
q_a49
-1
3
q_a48
-1
3
q_a47
-1
3
q_a46
-1
3
q_a45
-1
3
q_a44
-1
3
q_a43
-1
3
q_a42
-1
3
q_a41
-1
3
q_a40
-1
3
q_a4
-1
3
q_a39
-1
3
q_a38
-1
3
q_a37
-1
3
q_a36
-1
3
q_a35
-1
3
q_a34
-1
3
q_a33
-1
3
q_a32
-1
3
q_a31
-1
3
q_a30
-1
3
q_a3
-1
3
q_a29
-1
3
q_a28
-1
3
q_a27
-1
3
q_a26
-1
3
q_a25
-1
3
q_a24
-1
3
q_a23
-1
3
q_a22
-1
3
q_a21
-1
3
q_a20
-1
3
q_a2
-1
3
q_a19
-1
3
q_a18
-1
3
q_a17
-1
3
q_a16
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_b9
-1
3
data_b8
-1
3
data_b7
-1
3
data_b6
-1
3
data_b54
-1
3
data_b53
-1
3
data_b52
-1
3
data_b51
-1
3
data_b50
-1
3
data_b5
-1
3
data_b49
-1
3
data_b48
-1
3
data_b47
-1
3
data_b46
-1
3
data_b45
-1
3
data_b44
-1
3
data_b43
-1
3
data_b42
-1
3
data_b41
-1
3
data_b40
-1
3
data_b4
-1
3
data_b39
-1
3
data_b38
-1
3
data_b37
-1
3
data_b36
-1
3
data_b35
-1
3
data_b34
-1
3
data_b33
-1
3
data_b32
-1
3
data_b31
-1
3
data_b30
-1
3
data_b3
-1
3
data_b29
-1
3
data_b28
-1
3
data_b27
-1
3
data_b26
-1
3
data_b25
-1
3
data_b24
-1
3
data_b23
-1
3
data_b22
-1
3
data_b21
-1
3
data_b20
-1
3
data_b2
-1
3
data_b19
-1
3
data_b18
-1
3
data_b17
-1
3
data_b16
-1
3
data_b15
-1
3
data_b14
-1
3
data_b13
-1
3
data_b12
-1
3
data_b11
-1
3
data_b10
-1
3
data_b1
-1
3
data_b0
-1
3
clocken1
-1
3
clocken0
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
wren_a
-1
1
data_a9
-1
2
data_a8
-1
2
data_a7
-1
2
data_a6
-1
2
data_a54
-1
2
data_a53
-1
2
data_a52
-1
2
data_a51
-1
2
data_a50
-1
2
data_a5
-1
2
data_a49
-1
2
data_a48
-1
2
data_a47
-1
2
data_a46
-1
2
data_a45
-1
2
data_a44
-1
2
data_a43
-1
2
data_a42
-1
2
data_a41
-1
2
data_a40
-1
2
data_a4
-1
2
data_a39
-1
2
data_a38
-1
2
data_a37
-1
2
data_a36
-1
2
data_a35
-1
2
data_a34
-1
2
data_a33
-1
2
data_a32
-1
2
data_a31
-1
2
data_a30
-1
2
data_a3
-1
2
data_a29
-1
2
data_a28
-1
2
data_a27
-1
2
data_a26
-1
2
data_a25
-1
2
data_a24
-1
2
data_a23
-1
2
data_a22
-1
2
data_a21
-1
2
data_a20
-1
2
data_a2
-1
2
data_a19
-1
2
data_a18
-1
2
data_a17
-1
2
data_a16
-1
2
data_a15
-1
2
data_a14
-1
2
data_a13
-1
2
data_a12
-1
2
data_a11
-1
2
data_a10
-1
2
data_a1
-1
2
data_a0
-1
2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altdpram
# storage
db|FFT.(143).cnf
db|FFT.(143).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altdpram.tdf
713216b488e19857e19773cf6d8f34e
6
# user_parameter {
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
WIDTH
23
PARAMETER_SIGNED_DEC
USR
WIDTHAD
1
PARAMETER_SIGNED_DEC
USR
NUMWORDS
0
PARAMETER_SIGNED_DEC
USR
FILE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INDATA_REG
INCLOCK
PARAMETER_UNKNOWN
USR
INDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRADDRESS_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRCONTROL_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDADDRESS_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
RDADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDCONTROL_REG
UNREGISTERED
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
OUTDATA_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
USE_EAB
OFF
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
SUPPRESS_MEMORY_CONVERSION_WARNINGS
OFF
PARAMETER_UNKNOWN
DEF
INTENDED_DEVICE_FAMILY
APEX20KE
PARAMETER_UNKNOWN
DEF
ENABLE_RAM_BENCHMARKING_MODE
OFF
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
DISABLE_LE_RAM_LIMIT_CHECK
on
PARAMETER_UNKNOWN
USR
BYTE_SIZE
0
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA
1
PARAMETER_SIGNED_DEC
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
wren
-1
3
wraddress0
-1
3
rdaddress0
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2
-1
3
q19
-1
3
q18
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
outclocken
-1
3
outclock
-1
3
inclocken
-1
3
inclock
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
e:|altera|72|quartus|libraries|megafunctions|altsyncram.inc
1b5760dd55919ddb45bfb2c0e896218b
e:|altera|72|quartus|libraries|others|maxplus2|memmodes.inc
44d4551a35f349f0dbacaf799d39950
e:|altera|72|quartus|libraries|megafunctions|a_hdffe.inc
6e1dd1dda0dcf1122cd2b84d66c10b3
e:|altera|72|quartus|libraries|megafunctions|alt_le_rden_reg.inc
7591066e9fa6e1ee16e5ba18b60506f
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_mux
# storage
db|FFT.(144).cnf
db|FFT.(144).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.tdf
58f75cf5c2963ffeb4ea39e4a91f8e4
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
23
PARAMETER_UNKNOWN
USR
LPM_SIZE
2
PARAMETER_UNKNOWN
USR
LPM_WIDTHS
1
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mux_9oc
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
}
# used_port {
sel0
-1
3
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data1_9
-1
3
data1_8
-1
3
data1_7
-1
3
data1_6
-1
3
data1_5
-1
3
data1_4
-1
3
data1_3
-1
3
data1_22
-1
3
data1_21
-1
3
data1_20
-1
3
data1_2
-1
3
data1_19
-1
3
data1_18
-1
3
data1_17
-1
3
data1_16
-1
3
data1_15
-1
3
data1_14
-1
3
data1_13
-1
3
data1_12
-1
3
data1_11
-1
3
data1_10
-1
3
data1_1
-1
3
data1_0
-1
3
data0_9
-1
3
data0_8
-1
3
data0_7
-1
3
data0_6
-1
3
data0_5
-1
3
data0_4
-1
3
data0_3
-1
3
data0_22
-1
3
data0_21
-1
3
data0_20
-1
3
data0_2
-1
3
data0_19
-1
3
data0_18
-1
3
data0_17
-1
3
data0_16
-1
3
data0_15
-1
3
data0_14
-1
3
data0_13
-1
3
data0_12
-1
3
data0_11
-1
3
data0_10
-1
3
data0_1
-1
3
data0_0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|muxlut.inc
f172666ca13e5e31e17e3f6cb35af52
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
mux_9oc
# storage
db|FFT.(145).cnf
db|FFT.(145).cnf
# case_insensitive
# source_file
db|mux_9oc.tdf
77fc68ba49393bf9eb998a7cebfcd8c
6
# used_port {
sel0
-1
3
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data45
-1
3
data44
-1
3
data43
-1
3
data42
-1
3
data41
-1
3
data40
-1
3
data4
-1
3
data39
-1
3
data38
-1
3
data37
-1
3
data36
-1
3
data35
-1
3
data34
-1
3
data33
-1
3
data32
-1
3
data31
-1
3
data30
-1
3
data3
-1
3
data29
-1
3
data28
-1
3
data27
-1
3
data26
-1
3
data25
-1
3
data24
-1
3
data23
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_offload_buffer_mgr
# storage
db|FFT.(146).cnf
db|FFT.(146).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
buffer_depth
2048
PARAMETER_SIGNED_DEC
USR
segment_count
1
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
status_address_bits
1
PARAMETER_SIGNED_DEC
USR
data_bits
55
PARAMETER_SIGNED_DEC
USR
status_bits
23
PARAMETER_SIGNED_DEC
USR
data_bit_cntr_bits
6
PARAMETER_SIGNED_DEC
USR
status_bit_cntr_bits
5
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(buffer_read_data_out)
54 downto 0
PARAMETER_STRING
USR
 constraint(status_read_data_out)
22 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(buffer_read_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(status_read_address)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(147).cnf
db|FFT.(147).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
11
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
2048
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_c4j
PARAMETER_UNKNOWN
USR
}
# used_port {
Q9
-1
3
Q8
-1
3
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
CLK_EN
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_c4j
# storage
db|FFT.(148).cnf
db|FFT.(148).cnf
# case_insensitive
# source_file
db|cntr_c4j.tdf
77c219fb7ae56f714eed57eada892ce
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
clk_en
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(149).cnf
db|FFT.(149).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
23
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(150).cnf
db|FFT.(150).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
5
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
23
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_bbi
PARAMETER_UNKNOWN
USR
}
# used_port {
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_bbi
# storage
db|FFT.(151).cnf
db|FFT.(151).cnf
# case_insensitive
# source_file
db|cntr_bbi.tdf
2862eb892536cc5e8c22fd4411222
6
# used_port {
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(152).cnf
db|FFT.(152).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
23
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
SHIFTIN
-1
2
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(153).cnf
db|FFT.(153).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
17
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
LOAD
-1
3
ENABLE
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA2
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(154).cnf
db|FFT.(154).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
6
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
64
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
INIT_FILE
C:/Documents and Settings/wangwei/×ÀÃæ/rectangle.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_6fa1
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a
-1
3
clock0
-1
3
address_a
-1
3
wren_b
-1
1
wren_a
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
aclr0
-1
1
rden_b
-1
2
rden_a
-1
2
data_b
-1
2
data_a
-1
2
clocken3
-1
2
clocken2
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_6fa1
# storage
db|FFT.(155).cnf
db|FFT.(155).cnf
# case_insensitive
# source_file
db|altsyncram_6fa1.tdf
6c27d97d5dba16f4165fa858f913eb8
6
# used_port {
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
..|rectangle.mif
95363d19c9c8f2f33ec59eaf93a19d9
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_rom2
# storage
db|FFT.(56).cnf
db|FFT.(56).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_rom2.v
806246aabd9052e4cabcc654c762a66
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
lpm_rom2:inst19
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(156).cnf
db|FFT.(156).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
6
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
64
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
CLEAR0
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
DEF
INIT_FILE
C:/Documents and Settings/wangwei/×ÀÃæ/sin.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
DEF
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_kfa1
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a
-1
3
clock0
-1
3
address_a
-1
3
aclr0
-1
3
wren_b
-1
1
wren_a
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
rden_b
-1
2
rden_a
-1
2
data_b
-1
2
data_a
-1
2
clocken3
-1
2
clocken2
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
lpm_rom2:inst19|altsyncram:altsyncram_component
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_kfa1
# storage
db|FFT.(157).cnf
db|FFT.(157).cnf
# case_insensitive
# source_file
db|altsyncram_kfa1.tdf
6573817588bc443df1b7cf481f389a8
6
# used_port {
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
aclr0
-1
3
}
# memory_file {
..|sin.mif
c5c979b3efb81ae5d23ea0bc478d2155
}
# hierarchies {
lpm_rom2:inst19|altsyncram:altsyncram_component|altsyncram_kfa1:auto_generated
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(158).cnf
db|FFT.(158).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
6387
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
62206
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
4096
PARAMETER_UNKNOWN
USR
sld_segment_size
4096
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
194
PARAMETER_UNKNOWN
USR
sld_inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001110111111111
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
1
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(159).cnf
db|FFT.(159).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
6387
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
62206
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
4096
PARAMETER_SIGNED_DEC
USR
sld_segment_size
4096
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
194
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001110111111111
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(160).cnf
db|FFT.(160).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
56
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
12
PARAMETER_SIGNED_DEC
USR
sample_depth
4096
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
182
PARAMETER_SIGNED_DEC
USR
inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
12
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
11 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|FFT.(161).cnf
db|FFT.(161).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
56
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
182
PARAMETER_SIGNED_DEC
USR
inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_mgr
# storage
db|FFT.(162).cnf
db|FFT.(162).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_trigger_flow_mgr.vhd
3dbadd99fe363e4212223c9431c028a9
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
segment_size_bits
12
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
178
PARAMETER_SIGNED_DEC
USR
inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
PARAMETER_UNSIGNED_BIN
USR
 constraint(condition_met)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
11 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_buffer_manager
# storage
db|FFT.(163).cnf
db|FFT.(163).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
address_bits
12
PARAMETER_SIGNED_DEC
USR
segment_size_bits
12
PARAMETER_SIGNED_DEC
USR
num_segments_bits
1
PARAMETER_SIGNED_DEC
USR
 constraint(address)
11 downto 0
PARAMETER_STRING
USR
 constraint(post_count)
11 downto 0
PARAMETER_STRING
USR
 constraint(current_segment)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_offset)
11 downto 0
PARAMETER_STRING
USR
 constraint(last_trigger_address)
11 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
11 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
11 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(164).cnf
db|FFT.(164).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
12
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q9
-1
3
Q8
-1
3
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q11
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(165).cnf
db|FFT.(165).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
56
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
12
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
0
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
56
PARAMETER_SIGNED_DEC
USR
WIDTHAD_B
12
PARAMETER_SIGNED_DEC
USR
NUMWORDS_B
0
PARAMETER_SIGNED_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_SIGNED_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_SIGNED_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_o7p3
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b55
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a55
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b11
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a11
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_o7p3
# storage
db|FFT.(166).cnf
db|FFT.(166).cnf
# case_insensitive
# source_file
db|altsyncram_o7p3.tdf
3255ec68f6e98d3fdf9943ba37c1415
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b55
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a55
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b11
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a11
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_4hq1
# storage
db|FFT.(167).cnf
db|FFT.(167).cnf
# case_insensitive
# source_file
db|altsyncram_4hq1.tdf
e66e34196cc5a18e3fd63cfef170f8c8
6
# used_port {
wren_b
-1
3
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a55
-1
3
q_a54
-1
3
q_a53
-1
3
q_a52
-1
3
q_a51
-1
3
q_a50
-1
3
q_a5
-1
3
q_a49
-1
3
q_a48
-1
3
q_a47
-1
3
q_a46
-1
3
q_a45
-1
3
q_a44
-1
3
q_a43
-1
3
q_a42
-1
3
q_a41
-1
3
q_a40
-1
3
q_a4
-1
3
q_a39
-1
3
q_a38
-1
3
q_a37
-1
3
q_a36
-1
3
q_a35
-1
3
q_a34
-1
3
q_a33
-1
3
q_a32
-1
3
q_a31
-1
3
q_a30
-1
3
q_a3
-1
3
q_a29
-1
3
q_a28
-1
3
q_a27
-1
3
q_a26
-1
3
q_a25
-1
3
q_a24
-1
3
q_a23
-1
3
q_a22
-1
3
q_a21
-1
3
q_a20
-1
3
q_a2
-1
3
q_a19
-1
3
q_a18
-1
3
q_a17
-1
3
q_a16
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_b9
-1
3
data_b8
-1
3
data_b7
-1
3
data_b6
-1
3
data_b55
-1
3
data_b54
-1
3
data_b53
-1
3
data_b52
-1
3
data_b51
-1
3
data_b50
-1
3
data_b5
-1
3
data_b49
-1
3
data_b48
-1
3
data_b47
-1
3
data_b46
-1
3
data_b45
-1
3
data_b44
-1
3
data_b43
-1
3
data_b42
-1
3
data_b41
-1
3
data_b40
-1
3
data_b4
-1
3
data_b39
-1
3
data_b38
-1
3
data_b37
-1
3
data_b36
-1
3
data_b35
-1
3
data_b34
-1
3
data_b33
-1
3
data_b32
-1
3
data_b31
-1
3
data_b30
-1
3
data_b3
-1
3
data_b29
-1
3
data_b28
-1
3
data_b27
-1
3
data_b26
-1
3
data_b25
-1
3
data_b24
-1
3
data_b23
-1
3
data_b22
-1
3
data_b21
-1
3
data_b20
-1
3
data_b2
-1
3
data_b19
-1
3
data_b18
-1
3
data_b17
-1
3
data_b16
-1
3
data_b15
-1
3
data_b14
-1
3
data_b13
-1
3
data_b12
-1
3
data_b11
-1
3
data_b10
-1
3
data_b1
-1
3
data_b0
-1
3
clocken1
-1
3
clocken0
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b11
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a11
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
wren_a
-1
1
data_a9
-1
2
data_a8
-1
2
data_a7
-1
2
data_a6
-1
2
data_a55
-1
2
data_a54
-1
2
data_a53
-1
2
data_a52
-1
2
data_a51
-1
2
data_a50
-1
2
data_a5
-1
2
data_a49
-1
2
data_a48
-1
2
data_a47
-1
2
data_a46
-1
2
data_a45
-1
2
data_a44
-1
2
data_a43
-1
2
data_a42
-1
2
data_a41
-1
2
data_a40
-1
2
data_a4
-1
2
data_a39
-1
2
data_a38
-1
2
data_a37
-1
2
data_a36
-1
2
data_a35
-1
2
data_a34
-1
2
data_a33
-1
2
data_a32
-1
2
data_a31
-1
2
data_a30
-1
2
data_a3
-1
2
data_a29
-1
2
data_a28
-1
2
data_a27
-1
2
data_a26
-1
2
data_a25
-1
2
data_a24
-1
2
data_a23
-1
2
data_a22
-1
2
data_a21
-1
2
data_a20
-1
2
data_a2
-1
2
data_a19
-1
2
data_a18
-1
2
data_a17
-1
2
data_a16
-1
2
data_a15
-1
2
data_a14
-1
2
data_a13
-1
2
data_a12
-1
2
data_a11
-1
2
data_a10
-1
2
data_a1
-1
2
data_a0
-1
2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altdpram
# storage
db|FFT.(168).cnf
db|FFT.(168).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altdpram.tdf
713216b488e19857e19773cf6d8f34e
6
# user_parameter {
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
WIDTH
25
PARAMETER_SIGNED_DEC
USR
WIDTHAD
1
PARAMETER_SIGNED_DEC
USR
NUMWORDS
0
PARAMETER_SIGNED_DEC
USR
FILE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INDATA_REG
INCLOCK
PARAMETER_UNKNOWN
USR
INDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRADDRESS_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRCONTROL_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDADDRESS_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
RDADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDCONTROL_REG
UNREGISTERED
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
OUTDATA_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
USE_EAB
OFF
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
SUPPRESS_MEMORY_CONVERSION_WARNINGS
OFF
PARAMETER_UNKNOWN
DEF
INTENDED_DEVICE_FAMILY
APEX20KE
PARAMETER_UNKNOWN
DEF
ENABLE_RAM_BENCHMARKING_MODE
OFF
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
DISABLE_LE_RAM_LIMIT_CHECK
on
PARAMETER_UNKNOWN
USR
BYTE_SIZE
0
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA
1
PARAMETER_SIGNED_DEC
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
wren
-1
3
wraddress0
-1
3
rdaddress0
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q24
-1
3
q23
-1
3
q22
-1
3
q21
-1
3
q20
-1
3
q2
-1
3
q19
-1
3
q18
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
outclocken
-1
3
outclock
-1
3
inclocken
-1
3
inclock
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data24
-1
3
data23
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
e:|altera|72|quartus|libraries|megafunctions|altsyncram.inc
1b5760dd55919ddb45bfb2c0e896218b
e:|altera|72|quartus|libraries|others|maxplus2|memmodes.inc
44d4551a35f349f0dbacaf799d39950
e:|altera|72|quartus|libraries|megafunctions|a_hdffe.inc
6e1dd1dda0dcf1122cd2b84d66c10b3
e:|altera|72|quartus|libraries|megafunctions|alt_le_rden_reg.inc
7591066e9fa6e1ee16e5ba18b60506f
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_mux
# storage
db|FFT.(169).cnf
db|FFT.(169).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.tdf
58f75cf5c2963ffeb4ea39e4a91f8e4
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
25
PARAMETER_UNKNOWN
USR
LPM_SIZE
2
PARAMETER_UNKNOWN
USR
LPM_WIDTHS
1
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mux_boc
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
}
# used_port {
sel0
-1
3
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data1_9
-1
3
data1_8
-1
3
data1_7
-1
3
data1_6
-1
3
data1_5
-1
3
data1_4
-1
3
data1_3
-1
3
data1_24
-1
3
data1_23
-1
3
data1_22
-1
3
data1_21
-1
3
data1_20
-1
3
data1_2
-1
3
data1_19
-1
3
data1_18
-1
3
data1_17
-1
3
data1_16
-1
3
data1_15
-1
3
data1_14
-1
3
data1_13
-1
3
data1_12
-1
3
data1_11
-1
3
data1_10
-1
3
data1_1
-1
3
data1_0
-1
3
data0_9
-1
3
data0_8
-1
3
data0_7
-1
3
data0_6
-1
3
data0_5
-1
3
data0_4
-1
3
data0_3
-1
3
data0_24
-1
3
data0_23
-1
3
data0_22
-1
3
data0_21
-1
3
data0_20
-1
3
data0_2
-1
3
data0_19
-1
3
data0_18
-1
3
data0_17
-1
3
data0_16
-1
3
data0_15
-1
3
data0_14
-1
3
data0_13
-1
3
data0_12
-1
3
data0_11
-1
3
data0_10
-1
3
data0_1
-1
3
data0_0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
e:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|72|quartus|libraries|megafunctions|muxlut.inc
f172666ca13e5e31e17e3f6cb35af52
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
mux_boc
# storage
db|FFT.(170).cnf
db|FFT.(170).cnf
# case_insensitive
# source_file
db|mux_boc.tdf
8cad6eaffab45d156ac738259352e9
6
# used_port {
sel0
-1
3
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data49
-1
3
data48
-1
3
data47
-1
3
data46
-1
3
data45
-1
3
data44
-1
3
data43
-1
3
data42
-1
3
data41
-1
3
data40
-1
3
data4
-1
3
data39
-1
3
data38
-1
3
data37
-1
3
data36
-1
3
data35
-1
3
data34
-1
3
data33
-1
3
data32
-1
3
data31
-1
3
data30
-1
3
data3
-1
3
data29
-1
3
data28
-1
3
data27
-1
3
data26
-1
3
data25
-1
3
data24
-1
3
data23
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_offload_buffer_mgr
# storage
db|FFT.(171).cnf
db|FFT.(171).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
buffer_depth
4096
PARAMETER_SIGNED_DEC
USR
segment_count
1
PARAMETER_SIGNED_DEC
USR
mem_address_bits
12
PARAMETER_SIGNED_DEC
USR
status_address_bits
1
PARAMETER_SIGNED_DEC
USR
data_bits
56
PARAMETER_SIGNED_DEC
USR
status_bits
25
PARAMETER_SIGNED_DEC
USR
data_bit_cntr_bits
6
PARAMETER_SIGNED_DEC
USR
status_bit_cntr_bits
5
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(buffer_read_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(status_read_data_out)
24 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
11 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
11 downto 0
PARAMETER_STRING
USR
 constraint(buffer_read_address)
11 downto 0
PARAMETER_STRING
USR
 constraint(status_read_address)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(172).cnf
db|FFT.(172).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
12
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
4096
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_i4j
PARAMETER_UNKNOWN
USR
}
# used_port {
Q9
-1
3
Q8
-1
3
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q11
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
CLK_EN
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_i4j
# storage
db|FFT.(173).cnf
db|FFT.(173).cnf
# case_insensitive
# source_file
db|cntr_i4j.tdf
2279fc42103e1e5bb26698e048682634
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
clk_en
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(174).cnf
db|FFT.(174).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
25
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA24
-1
3
DATA23
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(175).cnf
db|FFT.(175).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
5
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
25
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_cbi
PARAMETER_UNKNOWN
USR
}
# used_port {
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_cbi
# storage
db|FFT.(176).cnf
db|FFT.(176).cnf
# case_insensitive
# source_file
db|cntr_cbi.tdf
65d627b7672a7d57665ccbe2424fbd
6
# used_port {
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(177).cnf
db|FFT.(177).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
25
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA5
-1
3
DATA4
-1
3
DATA3
-1
3
DATA24
-1
3
DATA23
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
SHIFTIN
-1
2
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(178).cnf
db|FFT.(178).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
14481
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
62206
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
193
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000111011111111
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
1
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(179).cnf
db|FFT.(179).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
14481
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
62206
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
193
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000111011111111
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(180).cnf
db|FFT.(180).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
56
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
sample_depth
2048
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
182
PARAMETER_SIGNED_DEC
USR
inversion_mask
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010001
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_mgr
# storage
db|FFT.(181).cnf
db|FFT.(181).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_trigger_flow_mgr.vhd
3dbadd99fe363e4212223c9431c028a9
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
power_up_trigger
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
178
PARAMETER_SIGNED_DEC
USR
inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
PARAMETER_UNSIGNED_BIN
USR
 constraint(condition_met)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(182).cnf
db|FFT.(182).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
56
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
11
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
0
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
56
PARAMETER_SIGNED_DEC
USR
WIDTHAD_B
11
PARAMETER_SIGNED_DEC
USR
NUMWORDS_B
0
PARAMETER_SIGNED_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_SIGNED_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_SIGNED_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_m7p3
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b55
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a55
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_m7p3
# storage
db|FFT.(183).cnf
db|FFT.(183).cnf
# case_insensitive
# source_file
db|altsyncram_m7p3.tdf
dd69362163579ab0fd9a85de5ea2b
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b55
-1
3
q_b54
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a55
-1
3
data_a54
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_2hq1
# storage
db|FFT.(184).cnf
db|FFT.(184).cnf
# case_insensitive
# source_file
db|altsyncram_2hq1.tdf
375051dc789dfca4a11fb5816469a3b
6
# used_port {
wren_b
-1
3
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a55
-1
3
q_a54
-1
3
q_a53
-1
3
q_a52
-1
3
q_a51
-1
3
q_a50
-1
3
q_a5
-1
3
q_a49
-1
3
q_a48
-1
3
q_a47
-1
3
q_a46
-1
3
q_a45
-1
3
q_a44
-1
3
q_a43
-1
3
q_a42
-1
3
q_a41
-1
3
q_a40
-1
3
q_a4
-1
3
q_a39
-1
3
q_a38
-1
3
q_a37
-1
3
q_a36
-1
3
q_a35
-1
3
q_a34
-1
3
q_a33
-1
3
q_a32
-1
3
q_a31
-1
3
q_a30
-1
3
q_a3
-1
3
q_a29
-1
3
q_a28
-1
3
q_a27
-1
3
q_a26
-1
3
q_a25
-1
3
q_a24
-1
3
q_a23
-1
3
q_a22
-1
3
q_a21
-1
3
q_a20
-1
3
q_a2
-1
3
q_a19
-1
3
q_a18
-1
3
q_a17
-1
3
q_a16
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_b9
-1
3
data_b8
-1
3
data_b7
-1
3
data_b6
-1
3
data_b55
-1
3
data_b54
-1
3
data_b53
-1
3
data_b52
-1
3
data_b51
-1
3
data_b50
-1
3
data_b5
-1
3
data_b49
-1
3
data_b48
-1
3
data_b47
-1
3
data_b46
-1
3
data_b45
-1
3
data_b44
-1
3
data_b43
-1
3
data_b42
-1
3
data_b41
-1
3
data_b40
-1
3
data_b4
-1
3
data_b39
-1
3
data_b38
-1
3
data_b37
-1
3
data_b36
-1
3
data_b35
-1
3
data_b34
-1
3
data_b33
-1
3
data_b32
-1
3
data_b31
-1
3
data_b30
-1
3
data_b3
-1
3
data_b29
-1
3
data_b28
-1
3
data_b27
-1
3
data_b26
-1
3
data_b25
-1
3
data_b24
-1
3
data_b23
-1
3
data_b22
-1
3
data_b21
-1
3
data_b20
-1
3
data_b2
-1
3
data_b19
-1
3
data_b18
-1
3
data_b17
-1
3
data_b16
-1
3
data_b15
-1
3
data_b14
-1
3
data_b13
-1
3
data_b12
-1
3
data_b11
-1
3
data_b10
-1
3
data_b1
-1
3
data_b0
-1
3
clocken1
-1
3
clocken0
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
wren_a
-1
1
data_a9
-1
2
data_a8
-1
2
data_a7
-1
2
data_a6
-1
2
data_a55
-1
2
data_a54
-1
2
data_a53
-1
2
data_a52
-1
2
data_a51
-1
2
data_a50
-1
2
data_a5
-1
2
data_a49
-1
2
data_a48
-1
2
data_a47
-1
2
data_a46
-1
2
data_a45
-1
2
data_a44
-1
2
data_a43
-1
2
data_a42
-1
2
data_a41
-1
2
data_a40
-1
2
data_a4
-1
2
data_a39
-1
2
data_a38
-1
2
data_a37
-1
2
data_a36
-1
2
data_a35
-1
2
data_a34
-1
2
data_a33
-1
2
data_a32
-1
2
data_a31
-1
2
data_a30
-1
2
data_a3
-1
2
data_a29
-1
2
data_a28
-1
2
data_a27
-1
2
data_a26
-1
2
data_a25
-1
2
data_a24
-1
2
data_a23
-1
2
data_a22
-1
2
data_a21
-1
2
data_a20
-1
2
data_a2
-1
2
data_a19
-1
2
data_a18
-1
2
data_a17
-1
2
data_a16
-1
2
data_a15
-1
2
data_a14
-1
2
data_a13
-1
2
data_a12
-1
2
data_a11
-1
2
data_a10
-1
2
data_a1
-1
2
data_a0
-1
2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_offload_buffer_mgr
# storage
db|FFT.(185).cnf
db|FFT.(185).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
buffer_depth
2048
PARAMETER_SIGNED_DEC
USR
segment_count
1
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
status_address_bits
1
PARAMETER_SIGNED_DEC
USR
data_bits
56
PARAMETER_SIGNED_DEC
USR
status_bits
23
PARAMETER_SIGNED_DEC
USR
data_bit_cntr_bits
6
PARAMETER_SIGNED_DEC
USR
status_bit_cntr_bits
5
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(buffer_read_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(status_read_data_out)
22 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(buffer_read_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(status_read_address)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(186).cnf
db|FFT.(186).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
65480
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
12957
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
193
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(187).cnf
db|FFT.(187).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
65480
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
12957
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
193
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(188).cnf
db|FFT.(188).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
56
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
sample_depth
2048
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_mgr
# storage
db|FFT.(189).cnf
db|FFT.(189).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_trigger_flow_mgr.vhd
3dbadd99fe363e4212223c9431c028a9
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
 constraint(condition_met)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(190).cnf
db|FFT.(190).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
65480
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
62206
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
193
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(191).cnf
db|FFT.(191).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
65480
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
62206
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
193
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(192).cnf
db|FFT.(192).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
65480
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
41069
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
193
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(193).cnf
db|FFT.(193).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
65480
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
41069
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
193
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(194).cnf
db|FFT.(194).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
65480
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
44325
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
193
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(195).cnf
db|FFT.(195).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
65480
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
44325
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
193
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(196).cnf
db|FFT.(196).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
56
PARAMETER_UNKNOWN
USR
sld_trigger_bits
56
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
65480
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
59497
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
193
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(197).cnf
db|FFT.(197).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
56
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
56
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
65480
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
59497
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
193
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
55 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
55 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
55 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
block
# storage
db|FFT.(0).cnf
db|FFT.(0).cnf
# case_insensitive
# source_file
block.bdf
201324c442c31a34fffc29f16b2e9c7
25
# internal_option {
BLOCK_DESIGN_NAMING
OFF
}
# hierarchies {
|
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|FFT.(198).cnf
db|FFT.(198).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
54
PARAMETER_UNKNOWN
USR
sld_trigger_bits
54
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
32016
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
3297
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
2048
PARAMETER_UNKNOWN
USR
sld_segment_size
2048
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
1
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
187
PARAMETER_UNKNOWN
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|FFT.(199).cnf
db|FFT.(199).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
54
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
54
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
32016
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
3297
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
2048
PARAMETER_SIGNED_DEC
USR
sld_segment_size
2048
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
187
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
53 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
53 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
53 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
53 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|FFT.(200).cnf
db|FFT.(200).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
54
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
1
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
sample_depth
2048
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
11
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
53 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
10 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|FFT.(201).cnf
db|FFT.(201).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
54
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
53 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(202).cnf
db|FFT.(202).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
162
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q99
-1
3
Q98
-1
3
Q97
-1
3
Q96
-1
3
Q95
-1
3
Q94
-1
3
Q93
-1
3
Q92
-1
3
Q91
-1
3
Q90
-1
3
Q9
-1
3
Q89
-1
3
Q88
-1
3
Q87
-1
3
Q86
-1
3
Q85
-1
3
Q84
-1
3
Q83
-1
3
Q82
-1
3
Q81
-1
3
Q80
-1
3
Q8
-1
3
Q79
-1
3
Q78
-1
3
Q77
-1
3
Q76
-1
3
Q75
-1
3
Q74
-1
3
Q73
-1
3
Q72
-1
3
Q71
-1
3
Q70
-1
3
Q7
-1
3
Q69
-1
3
Q68
-1
3
Q67
-1
3
Q66
-1
3
Q65
-1
3
Q64
-1
3
Q63
-1
3
Q62
-1
3
Q61
-1
3
Q60
-1
3
Q6
-1
3
Q59
-1
3
Q58
-1
3
Q57
-1
3
Q56
-1
3
Q55
-1
3
Q54
-1
3
Q53
-1
3
Q52
-1
3
Q51
-1
3
Q50
-1
3
Q5
-1
3
Q49
-1
3
Q48
-1
3
Q47
-1
3
Q46
-1
3
Q45
-1
3
Q44
-1
3
Q43
-1
3
Q42
-1
3
Q41
-1
3
Q40
-1
3
Q4
-1
3
Q39
-1
3
Q38
-1
3
Q37
-1
3
Q36
-1
3
Q35
-1
3
Q34
-1
3
Q33
-1
3
Q32
-1
3
Q31
-1
3
Q30
-1
3
Q3
-1
3
Q29
-1
3
Q28
-1
3
Q27
-1
3
Q26
-1
3
Q25
-1
3
Q24
-1
3
Q23
-1
3
Q22
-1
3
Q21
-1
3
Q20
-1
3
Q2
-1
3
Q19
-1
3
Q18
-1
3
Q17
-1
3
Q161
-1
3
Q160
-1
3
Q16
-1
3
Q159
-1
3
Q158
-1
3
Q157
-1
3
Q156
-1
3
Q155
-1
3
Q154
-1
3
Q153
-1
3
Q152
-1
3
Q151
-1
3
Q150
-1
3
Q15
-1
3
Q149
-1
3
Q148
-1
3
Q147
-1
3
Q146
-1
3
Q145
-1
3
Q144
-1
3
Q143
-1
3
Q142
-1
3
Q141
-1
3
Q140
-1
3
Q14
-1
3
Q139
-1
3
Q138
-1
3
Q137
-1
3
Q136
-1
3
Q135
-1
3
Q134
-1
3
Q133
-1
3
Q132
-1
3
Q131
-1
3
Q130
-1
3
Q13
-1
3
Q129
-1
3
Q128
-1
3
Q127
-1
3
Q126
-1
3
Q125
-1
3
Q124
-1
3
Q123
-1
3
Q122
-1
3
Q121
-1
3
Q120
-1
3
Q12
-1
3
Q119
-1
3
Q118
-1
3
Q117
-1
3
Q116
-1
3
Q115
-1
3
Q114
-1
3
Q113
-1
3
Q112
-1
3
Q111
-1
3
Q110
-1
3
Q11
-1
3
Q109
-1
3
Q108
-1
3
Q107
-1
3
Q106
-1
3
Q105
-1
3
Q104
-1
3
Q103
-1
3
Q102
-1
3
Q101
-1
3
Q100
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_mbpmg
# storage
db|FFT.(203).cnf
db|FFT.(203).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_mbpmg.vhd
dd6bdbbc4a40c39f4a6122a4ef6a95
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
data_bits
54
PARAMETER_SIGNED_DEC
USR
pattern_bits
3
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
sync_enabled
1
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
53 downto 0
PARAMETER_STRING
USR
 constraint(pattern_in)
161 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
altsyncram
# storage
db|FFT.(204).cnf
db|FFT.(204).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
56e814d9f431d4c82859865aa9372
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
WIDTH_BYTEENA
1
PARAMETER_UNKNOWN
DEF
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
54
PARAMETER_SIGNED_DEC
USR
WIDTHAD_A
11
PARAMETER_SIGNED_DEC
USR
NUMWORDS_A
0
PARAMETER_SIGNED_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WIDTH_B
54
PARAMETER_SIGNED_DEC
USR
WIDTHAD_B
11
PARAMETER_SIGNED_DEC
USR
NUMWORDS_B
0
PARAMETER_SIGNED_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_A
1
PARAMETER_SIGNED_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_SIGNED_DEC
USR
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_SIGNED_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_A
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
READ_DURING_WRITE_MODE_PORT_B
NEW_DATA_NO_NBE_READ
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
USR
MAXIMUM_DEPTH
0
PARAMETER_SIGNED_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_A
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_CORE_B
USE_INPUT_CLKEN
PARAMETER_UNKNOWN
USR
ENABLE_ECC
FALSE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_i7p3
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
e:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_i7p3
# storage
db|FFT.(205).cnf
db|FFT.(205).cnf
# case_insensitive
# source_file
db|altsyncram_i7p3.tdf
bb53317aca748c306fcfa5db9bcf663d
6
# used_port {
wren_a
-1
3
q_b9
-1
3
q_b8
-1
3
q_b7
-1
3
q_b6
-1
3
q_b53
-1
3
q_b52
-1
3
q_b51
-1
3
q_b50
-1
3
q_b5
-1
3
q_b49
-1
3
q_b48
-1
3
q_b47
-1
3
q_b46
-1
3
q_b45
-1
3
q_b44
-1
3
q_b43
-1
3
q_b42
-1
3
q_b41
-1
3
q_b40
-1
3
q_b4
-1
3
q_b39
-1
3
q_b38
-1
3
q_b37
-1
3
q_b36
-1
3
q_b35
-1
3
q_b34
-1
3
q_b33
-1
3
q_b32
-1
3
q_b31
-1
3
q_b30
-1
3
q_b3
-1
3
q_b29
-1
3
q_b28
-1
3
q_b27
-1
3
q_b26
-1
3
q_b25
-1
3
q_b24
-1
3
q_b23
-1
3
q_b22
-1
3
q_b21
-1
3
q_b20
-1
3
q_b2
-1
3
q_b19
-1
3
q_b18
-1
3
q_b17
-1
3
q_b16
-1
3
q_b15
-1
3
q_b14
-1
3
q_b13
-1
3
q_b12
-1
3
q_b11
-1
3
q_b10
-1
3
q_b1
-1
3
q_b0
-1
3
data_a9
-1
3
data_a8
-1
3
data_a7
-1
3
data_a6
-1
3
data_a53
-1
3
data_a52
-1
3
data_a51
-1
3
data_a50
-1
3
data_a5
-1
3
data_a49
-1
3
data_a48
-1
3
data_a47
-1
3
data_a46
-1
3
data_a45
-1
3
data_a44
-1
3
data_a43
-1
3
data_a42
-1
3
data_a41
-1
3
data_a40
-1
3
data_a4
-1
3
data_a39
-1
3
data_a38
-1
3
data_a37
-1
3
data_a36
-1
3
data_a35
-1
3
data_a34
-1
3
data_a33
-1
3
data_a32
-1
3
data_a31
-1
3
data_a30
-1
3
data_a3
-1
3
data_a29
-1
3
data_a28
-1
3
data_a27
-1
3
data_a26
-1
3
data_a25
-1
3
data_a24
-1
3
data_a23
-1
3
data_a22
-1
3
data_a21
-1
3
data_a20
-1
3
data_a2
-1
3
data_a19
-1
3
data_a18
-1
3
data_a17
-1
3
data_a16
-1
3
data_a15
-1
3
data_a14
-1
3
data_a13
-1
3
data_a12
-1
3
data_a11
-1
3
data_a10
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_ugq1
# storage
db|FFT.(206).cnf
db|FFT.(206).cnf
# case_insensitive
# source_file
db|altsyncram_ugq1.tdf
cdc5b3e591fdbc76a8d74f1a13db022
6
# used_port {
wren_b
-1
3
q_a9
-1
3
q_a8
-1
3
q_a7
-1
3
q_a6
-1
3
q_a53
-1
3
q_a52
-1
3
q_a51
-1
3
q_a50
-1
3
q_a5
-1
3
q_a49
-1
3
q_a48
-1
3
q_a47
-1
3
q_a46
-1
3
q_a45
-1
3
q_a44
-1
3
q_a43
-1
3
q_a42
-1
3
q_a41
-1
3
q_a40
-1
3
q_a4
-1
3
q_a39
-1
3
q_a38
-1
3
q_a37
-1
3
q_a36
-1
3
q_a35
-1
3
q_a34
-1
3
q_a33
-1
3
q_a32
-1
3
q_a31
-1
3
q_a30
-1
3
q_a3
-1
3
q_a29
-1
3
q_a28
-1
3
q_a27
-1
3
q_a26
-1
3
q_a25
-1
3
q_a24
-1
3
q_a23
-1
3
q_a22
-1
3
q_a21
-1
3
q_a20
-1
3
q_a2
-1
3
q_a19
-1
3
q_a18
-1
3
q_a17
-1
3
q_a16
-1
3
q_a15
-1
3
q_a14
-1
3
q_a13
-1
3
q_a12
-1
3
q_a11
-1
3
q_a10
-1
3
q_a1
-1
3
q_a0
-1
3
data_b9
-1
3
data_b8
-1
3
data_b7
-1
3
data_b6
-1
3
data_b53
-1
3
data_b52
-1
3
data_b51
-1
3
data_b50
-1
3
data_b5
-1
3
data_b49
-1
3
data_b48
-1
3
data_b47
-1
3
data_b46
-1
3
data_b45
-1
3
data_b44
-1
3
data_b43
-1
3
data_b42
-1
3
data_b41
-1
3
data_b40
-1
3
data_b4
-1
3
data_b39
-1
3
data_b38
-1
3
data_b37
-1
3
data_b36
-1
3
data_b35
-1
3
data_b34
-1
3
data_b33
-1
3
data_b32
-1
3
data_b31
-1
3
data_b30
-1
3
data_b3
-1
3
data_b29
-1
3
data_b28
-1
3
data_b27
-1
3
data_b26
-1
3
data_b25
-1
3
data_b24
-1
3
data_b23
-1
3
data_b22
-1
3
data_b21
-1
3
data_b20
-1
3
data_b2
-1
3
data_b19
-1
3
data_b18
-1
3
data_b17
-1
3
data_b16
-1
3
data_b15
-1
3
data_b14
-1
3
data_b13
-1
3
data_b12
-1
3
data_b11
-1
3
data_b10
-1
3
data_b1
-1
3
data_b0
-1
3
clocken1
-1
3
clocken0
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
wren_a
-1
1
data_a9
-1
2
data_a8
-1
2
data_a7
-1
2
data_a6
-1
2
data_a53
-1
2
data_a52
-1
2
data_a51
-1
2
data_a50
-1
2
data_a5
-1
2
data_a49
-1
2
data_a48
-1
2
data_a47
-1
2
data_a46
-1
2
data_a45
-1
2
data_a44
-1
2
data_a43
-1
2
data_a42
-1
2
data_a41
-1
2
data_a40
-1
2
data_a4
-1
2
data_a39
-1
2
data_a38
-1
2
data_a37
-1
2
data_a36
-1
2
data_a35
-1
2
data_a34
-1
2
data_a33
-1
2
data_a32
-1
2
data_a31
-1
2
data_a30
-1
2
data_a3
-1
2
data_a29
-1
2
data_a28
-1
2
data_a27
-1
2
data_a26
-1
2
data_a25
-1
2
data_a24
-1
2
data_a23
-1
2
data_a22
-1
2
data_a21
-1
2
data_a20
-1
2
data_a2
-1
2
data_a19
-1
2
data_a18
-1
2
data_a17
-1
2
data_a16
-1
2
data_a15
-1
2
data_a14
-1
2
data_a13
-1
2
data_a12
-1
2
data_a11
-1
2
data_a10
-1
2
data_a1
-1
2
data_a0
-1
2
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_offload_buffer_mgr
# storage
db|FFT.(207).cnf
db|FFT.(207).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|sld_buffer_manager.vhd
b57ee25a9b12d5c9ac54b2bb2b537d76
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
buffer_depth
2048
PARAMETER_SIGNED_DEC
USR
segment_count
1
PARAMETER_SIGNED_DEC
USR
mem_address_bits
11
PARAMETER_SIGNED_DEC
USR
status_address_bits
1
PARAMETER_SIGNED_DEC
USR
data_bits
54
PARAMETER_SIGNED_DEC
USR
status_bits
23
PARAMETER_SIGNED_DEC
USR
data_bit_cntr_bits
6
PARAMETER_SIGNED_DEC
USR
status_bit_cntr_bits
5
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
 constraint(buffer_read_data_out)
53 downto 0
PARAMETER_STRING
USR
 constraint(status_read_data_out)
22 downto 0
PARAMETER_STRING
USR
 constraint(trigger_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(last_buffer_write_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(buffer_read_address)
10 downto 0
PARAMETER_STRING
USR
 constraint(status_read_address)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_counter
# storage
db|FFT.(208).cnf
db|FFT.(208).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.tdf
7abee5a5cf89bcfc4fc2558440fed452
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
6
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
54
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
OFF
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_fbi
PARAMETER_UNKNOWN
USR
}
# used_port {
Q5
-1
3
Q4
-1
3
Q3
-1
3
Q2
-1
3
Q1
-1
3
Q0
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
e:|altera|72|quartus|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
e:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|72|quartus|libraries|megafunctions|lpm_counter.inc
7f888b135ddf66f0653c44cb18ac5
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter_f.inc
93a5aae1d8bd19c9e8e8eef93ab2177d
e:|altera|72|quartus|libraries|megafunctions|alt_synch_counter.inc
09966d10c3e95c888bf8e443df34d8
e:|altera|72|quartus|libraries|megafunctions|alt_counter_f10ke.inc
536f8da8218b4a93689416f9baea1880
e:|altera|72|quartus|libraries|megafunctions|alt_counter_stratix.inc
2251b94d26afaa53635df1aff6b6e7be
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
cntr_fbi
# storage
db|FFT.(209).cnf
db|FFT.(209).cnf
# case_insensitive
# source_file
db|cntr_fbi.tdf
1a71ea902eca4a894c122bd7fe9e4780
6
# used_port {
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
aclr
-1
3
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|FFT.(210).cnf
db|FFT.(210).cnf
# case_insensitive
# source_file
e:|altera|72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
54
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
LOAD
-1
3
DATA9
-1
3
DATA8
-1
3
DATA7
-1
3
DATA6
-1
3
DATA53
-1
3
DATA52
-1
3
DATA51
-1
3
DATA50
-1
3
DATA5
-1
3
DATA49
-1
3
DATA48
-1
3
DATA47
-1
3
DATA46
-1
3
DATA45
-1
3
DATA44
-1
3
DATA43
-1
3
DATA42
-1
3
DATA41
-1
3
DATA40
-1
3
DATA4
-1
3
DATA39
-1
3
DATA38
-1
3
DATA37
-1
3
DATA36
-1
3
DATA35
-1
3
DATA34
-1
3
DATA33
-1
3
DATA32
-1
3
DATA31
-1
3
DATA30
-1
3
DATA3
-1
3
DATA29
-1
3
DATA28
-1
3
DATA27
-1
3
DATA26
-1
3
DATA25
-1
3
DATA24
-1
3
DATA23
-1
3
DATA22
-1
3
DATA21
-1
3
DATA20
-1
3
DATA2
-1
3
DATA19
-1
3
DATA18
-1
3
DATA17
-1
3
DATA16
-1
3
DATA15
-1
3
DATA14
-1
3
DATA13
-1
3
DATA12
-1
3
DATA11
-1
3
DATA10
-1
3
DATA1
-1
3
DATA0
-1
3
CLOCK
-1
3
ACLR
-1
3
SHIFTIN
-1
2
ENABLE
-1
2
}
# include_file {
e:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
e:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete

