module s2p(clk,reset,sink_valid,data_in,data_out0,data_out1,source_valid);

input clk,reset,sink_valid;
input [15:0] data_in;
output source_valid;
output[15:0] data_out0,data_out1;

parameter scale=7'b1000000; 
reg cnt;
reg[6:0]count;
reg[15:0] data_temp[1:0];

always@(posedge clk or negedge reset)begin
	if(!reset)begin
		count<=7'b0000_000;
		cnt<=1'b0;
		data_temp[0]<=16'b0000_0000_0000_0000;
		data_temp[1]<=16'b0000_0000_0000_0000;
		end
	else if(sink_valid==1'b1)
		begin
		cnt<=cnt+1'b1;
		if(count<scale+7'b0000_001)
			count<=count+7'b0000_001;
		else
			count<=7'b0000_000;
		data_temp[cnt]<=data_in;
		end
	else begin
		cnt<=1'b0;
		data_temp[0]<=16'b0000_0000_0000_0000;
		data_temp[1]<=16'b0000_0000_0000_0000;
		end
end


assign data_out0=(count>1&&cnt==0)?data_temp[0]:16'b0000_0000_0000_0000;
assign data_out1=(count>1&&cnt==0)?data_temp[1]:16'b0000_0000_0000_0000;	
assign source_valid=(count>1&&reset==1&&cnt==0)?1'b1:1'b0;

endmodule	