--alt_u_div DEVICE_FAMILY="Stratix II" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=6 WIDTH_N=6 WIDTH_Q=6 WIDTH_R=6 denominator numerator quotient remainder
--VERSION_BEGIN 7.2 cbx_cycloneii 2007:06:13:15:47:32:SJ cbx_lpm_abs 2006:04:25:14:52:42:SJ cbx_lpm_add_sub 2007:08:06:16:01:34:SJ cbx_lpm_divide 2007:01:30:03:58:02:SJ cbx_mgl 2007:08:03:15:48:12:SJ cbx_stratix 2007:05:02:16:27:14:SJ cbx_stratixii 2007:06:28:17:26:26:SJ cbx_util_mgl 2007:06:01:06:37:30:SJ  VERSION_END


-- Copyright (C) 1991-2007 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.



--synthesis_resources = lut 27 
SUBDESIGN alt_u_div_q0f
( 
	den_out[5..0]	:	output;
	denominator[5..0]	:	input;
	numerator[5..0]	:	input;
	quotient[5..0]	:	output;
	remainder[5..0]	:	output;
) 
VARIABLE
	add_sub_0_result_int[1..0]	:	WIRE;
	add_sub_0_cout	:	WIRE;
	add_sub_0_dataa[0..0]	:	WIRE;
	add_sub_0_datab[0..0]	:	WIRE;
	add_sub_0_result[0..0]	:	WIRE;
	add_sub_1_result_int[2..0]	:	WIRE;
	add_sub_1_cout	:	WIRE;
	add_sub_1_dataa[1..0]	:	WIRE;
	add_sub_1_datab[1..0]	:	WIRE;
	add_sub_1_result[1..0]	:	WIRE;
	add_sub_2_result_int[3..0]	:	WIRE;
	add_sub_2_cout	:	WIRE;
	add_sub_2_dataa[2..0]	:	WIRE;
	add_sub_2_datab[2..0]	:	WIRE;
	add_sub_2_result[2..0]	:	WIRE;
	add_sub_3_result_int[4..0]	:	WIRE;
	add_sub_3_cout	:	WIRE;
	add_sub_3_dataa[3..0]	:	WIRE;
	add_sub_3_datab[3..0]	:	WIRE;
	add_sub_3_result[3..0]	:	WIRE;
	add_sub_4_result_int[5..0]	:	WIRE;
	add_sub_4_cout	:	WIRE;
	add_sub_4_dataa[4..0]	:	WIRE;
	add_sub_4_datab[4..0]	:	WIRE;
	add_sub_4_result[4..0]	:	WIRE;
	add_sub_5_result_int[6..0]	:	WIRE;
	add_sub_5_cout	:	WIRE;
	add_sub_5_dataa[5..0]	:	WIRE;
	add_sub_5_datab[5..0]	:	WIRE;
	add_sub_5_result[5..0]	:	WIRE;
	DenominatorIn[48..0]	: WIRE;
	DenominatorIn_tmp[48..0]	: WIRE;
	gnd_wire	: WIRE;
	nose[41..0]	: WIRE;
	NumeratorIn[41..0]	: WIRE;
	NumeratorIn_tmp[41..0]	: WIRE;
	prestg[35..0]	: WIRE;
	quotient_tmp[5..0]	: WIRE;
	sel[41..0]	: WIRE;
	selnose[41..0]	: WIRE;
	StageIn[41..0]	: WIRE;
	StageIn_tmp[41..0]	: WIRE;
	StageOut[35..0]	: WIRE;

BEGIN 
	add_sub_0_result_int[] = (0, add_sub_0_dataa[]) - (0, add_sub_0_datab[]);
	add_sub_0_result[] = add_sub_0_result_int[0..0];
	add_sub_0_cout = !add_sub_0_result_int[1];
	add_sub_0_dataa[] = NumeratorIn[5..5];
	add_sub_0_datab[] = DenominatorIn[0..0];
	add_sub_1_result_int[] = (0, add_sub_1_dataa[]) - (0, add_sub_1_datab[]);
	add_sub_1_result[] = add_sub_1_result_int[1..0];
	add_sub_1_cout = !add_sub_1_result_int[2];
	add_sub_1_dataa[] = ( StageIn[6..6], NumeratorIn[10..10]);
	add_sub_1_datab[] = DenominatorIn[8..7];
	add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]);
	add_sub_2_result[] = add_sub_2_result_int[2..0];
	add_sub_2_cout = !add_sub_2_result_int[3];
	add_sub_2_dataa[] = ( StageIn[13..12], NumeratorIn[15..15]);
	add_sub_2_datab[] = DenominatorIn[16..14];
	add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]);
	add_sub_3_result[] = add_sub_3_result_int[3..0];
	add_sub_3_cout = !add_sub_3_result_int[4];
	add_sub_3_dataa[] = ( StageIn[20..18], NumeratorIn[20..20]);
	add_sub_3_datab[] = DenominatorIn[24..21];
	add_sub_4_result_int[] = (0, add_sub_4_dataa[]) - (0, add_sub_4_datab[]);
	add_sub_4_result[] = add_sub_4_result_int[4..0];
	add_sub_4_cout = !add_sub_4_result_int[5];
	add_sub_4_dataa[] = ( StageIn[27..24], NumeratorIn[25..25]);
	add_sub_4_datab[] = DenominatorIn[32..28];
	add_sub_5_result_int[] = (0, add_sub_5_dataa[]) - (0, add_sub_5_datab[]);
	add_sub_5_result[] = add_sub_5_result_int[5..0];
	add_sub_5_cout = !add_sub_5_result_int[6];
	add_sub_5_dataa[] = ( StageIn[34..30], NumeratorIn[30..30]);
	add_sub_5_datab[] = DenominatorIn[40..35];
	den_out[5..0] = DenominatorIn[40..35];
	DenominatorIn[] = (gnd_wire # DenominatorIn_tmp[]);
	DenominatorIn_tmp[] = ( DenominatorIn[41..0], ( gnd_wire, denominator[]));
	gnd_wire = B"0";
	nose[] = ( B"000000", (add_sub_5_cout # gnd_wire), B"000000", (add_sub_4_cout # gnd_wire), B"000000", (add_sub_3_cout # gnd_wire), B"000000", (add_sub_2_cout # gnd_wire), B"000000", (add_sub_1_cout # gnd_wire), B"000000", (add_sub_0_cout # gnd_wire));
	NumeratorIn[] = (gnd_wire # NumeratorIn_tmp[]);
	NumeratorIn_tmp[] = ( NumeratorIn[35..0], numerator[]);
	prestg[] = ( add_sub_5_result[], GND, add_sub_4_result[], B"00", add_sub_3_result[], B"000", add_sub_2_result[], B"0000", add_sub_1_result[], B"00000", add_sub_0_result[]);
	quotient[] = quotient_tmp[];
	quotient_tmp[] = ( (! selnose[0..0]), (! selnose[7..7]), (! selnose[14..14]), (! selnose[21..21]), (! selnose[28..28]), (! selnose[35..35]));
	remainder[5..0] = StageIn[41..36];
	sel[] = ( gnd_wire, (gnd_wire # (sel[41..41] # DenominatorIn[47..47])), (gnd_wire # (sel[40..40] # DenominatorIn[46..46])), (gnd_wire # (sel[39..39] # DenominatorIn[45..45])), (gnd_wire # (sel[38..38] # DenominatorIn[44..44])), (gnd_wire # (sel[37..37] # DenominatorIn[43..43])), gnd_wire, (gnd_wire # (sel[35..35] # DenominatorIn[40..40])), (gnd_wire # (sel[34..34] # DenominatorIn[39..39])), (gnd_wire # (sel[33..33] # DenominatorIn[38..38])), (gnd_wire # (sel[32..32] # DenominatorIn[37..37])), (gnd_wire # (sel[31..31] # DenominatorIn[36..36])), gnd_wire, (gnd_wire # (sel[29..29] # DenominatorIn[33..33])), (gnd_wire # (sel[28..28] # DenominatorIn[32..32])), (gnd_wire # (sel[27..27] # DenominatorIn[31..31])), (gnd_wire # (sel[26..26] # DenominatorIn[30..30])), (gnd_wire # (sel[25..25] # DenominatorIn[29..29])), gnd_wire, (gnd_wire # (sel[23..23] # DenominatorIn[26..26])), (gnd_wire # (sel[22..22] # DenominatorIn[25..25])), (gnd_wire # (sel[21..21] # DenominatorIn[24..24])), (gnd_wire # (sel[20..20] # DenominatorIn[23..23])), (gnd_wire # (sel[19..19] # DenominatorIn[22..22])), gnd_wire, (gnd_wire # (sel[17..17] # DenominatorIn[19..19])), (gnd_wire # (sel[16..16] # DenominatorIn[18..18])), (gnd_wire # (sel[15..15] # DenominatorIn[17..17])), (gnd_wire # (sel[14..14] # DenominatorIn[16..16])), (gnd_wire # (sel[13..13] # DenominatorIn[15..15])), gnd_wire, (gnd_wire # (sel[11..11] # DenominatorIn[12..12])), (gnd_wire # (sel[10..10] # DenominatorIn[11..11])), (gnd_wire # (sel[9..9] # DenominatorIn[10..10])), (gnd_wire # (sel[8..8] # DenominatorIn[9..9])), (gnd_wire # (sel[7..7] # DenominatorIn[8..8])), gnd_wire, (gnd_wire # (sel[5..5] # DenominatorIn[5..5])), (gnd_wire # (sel[4..4] # DenominatorIn[4..4])), (gnd_wire # (sel[3..3] # DenominatorIn[3..3])), (gnd_wire # (sel[2..2] # DenominatorIn[2..2])), (gnd_wire # (sel[1..1] # DenominatorIn[1..1])));
	selnose[] = ( ((gnd_wire # (! nose[41..41])) # sel[41..41]), ((gnd_wire # (! nose[40..40])) # sel[40..40]), ((gnd_wire # (! nose[39..39])) # sel[39..39]), ((gnd_wire # (! nose[38..38])) # sel[38..38]), ((gnd_wire # (! nose[37..37])) # sel[37..37]), ((gnd_wire # (! nose[36..36])) # sel[36..36]), ((gnd_wire # (! nose[35..35])) # sel[35..35]), ((gnd_wire # (! nose[34..34])) # sel[34..34]), ((gnd_wire # (! nose[33..33])) # sel[33..33]), ((gnd_wire # (! nose[32..32])) # sel[32..32]), ((gnd_wire # (! nose[31..31])) # sel[31..31]), ((gnd_wire # (! nose[30..30])) # sel[30..30]), ((gnd_wire # (! nose[29..29])) # sel[29..29]), ((gnd_wire # (! nose[28..28])) # sel[28..28]), ((gnd_wire # (! nose[27..27])) # sel[27..27]), ((gnd_wire # (! nose[26..26])) # sel[26..26]), ((gnd_wire # (! nose[25..25])) # sel[25..25]), ((gnd_wire # (! nose[24..24])) # sel[24..24]), ((gnd_wire # (! nose[23..23])) # sel[23..23]), ((gnd_wire # (! nose[22..22])) # sel[22..22]), ((gnd_wire # (! nose[21..21])) # sel[21..21]), ((gnd_wire # (! nose[20..20])) # sel[20..20]), ((gnd_wire # (! nose[19..19])) # sel[19..19]), ((gnd_wire # (! nose[18..18])) # sel[18..18]), ((gnd_wire # (! nose[17..17])) # sel[17..17]), ((gnd_wire # (! nose[16..16])) # sel[16..16]), ((gnd_wire # (! nose[15..15])) # sel[15..15]), ((gnd_wire # (! nose[14..14])) # sel[14..14]), ((gnd_wire # (! nose[13..13])) # sel[13..13]), ((gnd_wire # (! nose[12..12])) # sel[12..12]), ((gnd_wire # (! nose[11..11])) # sel[11..11]), ((gnd_wire # (! nose[10..10])) # sel[10..10]), ((gnd_wire # (! nose[9..9])) # sel[9..9]), ((gnd_wire # (! nose[8..8])) # sel[8..8]), ((gnd_wire # (! nose[7..7])) # sel[7..7]), ((gnd_wire # (! nose[6..6])) # sel[6..6]), ((gnd_wire # (! nose[5..5])) # sel[5..5]), ((gnd_wire # (! nose[4..4])) # sel[4..4]), ((gnd_wire # (! nose[3..3])) # sel[3..3]), ((gnd_wire # (! nose[2..2])) # sel[2..2]), ((gnd_wire # (! nose[1..1])) # sel[1..1]), ((gnd_wire # (! nose[0..0])) # sel[0..0]));
	StageIn[] = (gnd_wire # StageIn_tmp[]);
	StageIn_tmp[] = ( StageOut[35..0], B"000000");
	StageOut[] = ( ((( StageIn[34..30], NumeratorIn[30..30]) & selnose[35..35]) # (prestg[35..30] & (! selnose[35..35]))), ((( StageIn[28..24], NumeratorIn[25..25]) & selnose[28..28]) # (prestg[29..24] & (! selnose[28..28]))), ((( StageIn[22..18], NumeratorIn[20..20]) & selnose[21..21]) # (prestg[23..18] & (! selnose[21..21]))), ((( StageIn[16..12], NumeratorIn[15..15]) & selnose[14..14]) # (prestg[17..12] & (! selnose[14..14]))), ((( StageIn[10..6], NumeratorIn[10..10]) & selnose[7..7]) # (prestg[11..6] & (! selnose[7..7]))), ((( StageIn[4..0], NumeratorIn[5..5]) & selnose[0..0]) # (prestg[5..0] & (! selnose[0..0]))));
END;
--VALID FILE
