module Rate_Measure(
						En,
						Reset,
						Rate_Pulse,
						Measure_Ctrl,
						Rate_Pulse_Data,
						Rate_Pulse_Alarm
						);
input  En;
input  Reset;
input  Rate_Pulse;
input  Measure_Ctrl;
output [15:0] Rate_Pulse_Data;
output Rate_Pulse_Alarm;

reg [15:0] Rate_Pulse_Data;
reg Rate_Pulse_Alarm;

wire Counter_Clock;

assign Counter_Clock = Measure_Ctrl && Rate_Pulse;

always @(posedge Counter_Clock)
begin

  if((En == 1'b1) || (Reset == 1'b1))
  begin
    Rate_Pulse_Data  <= 16'b0;
    Rate_Pulse_Alarm <= 1'b0;
  end
  
  else
    begin
      begin
        if(Rate_Pulse_Data < 16'b1111111111111111)
        begin
          Rate_Pulse_Data <= Rate_Pulse_Data + 16'b1;
          Rate_Pulse_Alarm <= 1'b0;
        end
        else
        begin
          Rate_Pulse_Data  <= 16'b0;
          Rate_Pulse_Alarm <= 1'b1;
        end
      end
    end
  
end

endmodule