--A1L41 is Y_1~202
A1L41_p1_out = C1_2 & B & !A & !G2_L & !G1_L;
A1L41_p2_out = B & A & C1_3 & !G2_L & !G1_L;
A1L41_p3_out = !B & !A & C1_0 & !G2_L & !G1_L;
A1L41_p4_out = !B & A & C1_1 & !G2_L & !G1_L;
A1L41_or_out = A1L41_p1_out # A1L41_p2_out # A1L41_p3_out # A1L41_p4_out;
A1L41 = A1L41_or_out;


--A1L61 is Y_2$latch$d_and~200
A1L61_p1_out = C2_1 & A & !B;
A1L61_p2_out = A & B & C2_3;
A1L61_p3_out = !A & !B & C2_0;
A1L61_p4_out = !A & B & C2_2;
A1L61_or_out = A1L61_p1_out # A1L61_p2_out # A1L61_p3_out # A1L61_p4_out;
A1L61 = A1L61_or_out;


--A1L81 is Y_2$latch~10
A1L81_p1_out = A1L71 & !G2_L & !G1_L & A1L61;
A1L81_p2_out = A1L81 & !G2_L & !G1_L;
A1L81_p3_out = A1L81 & !G2_L & !G1_L & A1L61;
A1L81_or_out = A1L81_p1_out # A1L81_p2_out # A1L81_p3_out;
A1L81 = A1L81_or_out;


--A1L71 is Y_2$latch$en_or~2sexp
A1L71 = EXP(!G2_L & !G1_L);


--G1_L is G1_L
--operation mode is input

G1_L = INPUT();


--G2_L is G2_L
--operation mode is input

G2_L = INPUT();


--B is B
--operation mode is input

B = INPUT();


--A is A
--operation mode is input

A = INPUT();


--C1_0 is C1_0
--operation mode is input

C1_0 = INPUT();


--C1_1 is C1_1
--operation mode is input

C1_1 = INPUT();


--C1_2 is C1_2
--operation mode is input

C1_2 = INPUT();


--C1_3 is C1_3
--operation mode is input

C1_3 = INPUT();


--C2_0 is C2_0
--operation mode is input

C2_0 = INPUT();


--C2_1 is C2_1
--operation mode is input

C2_1 = INPUT();


--C2_2 is C2_2
--operation mode is input

C2_2 = INPUT();


--C2_3 is C2_3
--operation mode is input

C2_3 = INPUT();


--Y_1 is Y_1
--operation mode is output

Y_1 = OUTPUT(A1L41);


--Y_2 is Y_2
--operation mode is output

Y_2 = OUTPUT(A1L81);


