Version 4.2 Build 157 12/07/2004 SJ Full Version
2
1857
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
RETIME_OFF
REMAP_OFF
0
-- Start Partition --
|
ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP
Off
ADV_NETLIST_OPT_SYNTH_GATE_RETIME
Off
STATE_MACHINE_PROCESSING
Auto
STRATIXII_OPTIMIZATION_TECHNIQUE
Balanced
CYCLONE_OPTIMIZATION_TECHNIQUE
Balanced
CYCLONEII_OPTIMIZATION_TECHNIQUE
Balanced
STRATIX_OPTIMIZATION_TECHNIQUE
Balanced
MAXII_OPTIMIZATION_TECHNIQUE
Balanced
----
-- End Partition --
# entity
FIFO_16_16
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
FIFO_16_16.v
1155061714
7
# storage
db|FIFO_16_16.(0).cnf
db|FIFO_16_16.(0).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
}
# end
# entity
altdpram
# case_insensitive
# source_file
d:|altera|quartus42|libraries|megafunctions|altdpram.tdf
1101745300
6
# storage
db|FIFO_16_16.(1).cnf
db|FIFO_16_16.(1).cnf
# user_parameter {
WIDTH
16
PARAMETER_UNKNOWN
USR
WIDTHAD
4
PARAMETER_UNKNOWN
USR
NUMWORDS
16
PARAMETER_UNKNOWN
USR
FILE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INDATA_REG
INCLOCK
PARAMETER_UNKNOWN
USR
INDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRADDRESS_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
WRCONTROL_REG
INCLOCK
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDADDRESS_REG
OUTCLOCK
PARAMETER_UNKNOWN
USR
RDADDRESS_ACLR
OFF
PARAMETER_UNKNOWN
USR
RDCONTROL_REG
UNREGISTERED
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR
OFF
PARAMETER_UNKNOWN
USR
OUTDATA_REG
UNREGISTERED
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR
OFF
PARAMETER_UNKNOWN
USR
USE_EAB
ON
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
2048
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
ACEX1K
PARAMETER_UNKNOWN
USR
SUPPRESS_MEMORY_CONVERSION_WARNINGS
OFF
PARAMETER_UNKNOWN
DEF
INTENDED_DEVICE_FAMILY
APEX20KE
PARAMETER_UNKNOWN
DEF
ENABLE_RAM_BENCHMARKING_MODE
OFF
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
data0
data10
data11
data12
data13
data14
data15
data1
data2
data3
data4
data5
data6
data7
data8
data9
inclock
outclock
q0
q10
q11
q12
q13
q14
q15
q1
q2
q3
q4
q5
q6
q7
q8
q9
rdaddress0
rdaddress1
rdaddress2
rdaddress3
wraddress0
wraddress1
wraddress2
wraddress3
wren
}
# include_file {
d:|altera|quartus42|libraries|others|maxplus2|memmodes.inc
1094874602
d:|altera|quartus42|libraries|megafunctions|lpm_decode.inc
1094870100
d:|altera|quartus42|libraries|megafunctions|lpm_mux.inc
1094870318
d:|altera|quartus42|libraries|megafunctions|a_hdffe.inc
1094867448
d:|altera|quartus42|libraries|megafunctions|a_rdenreg.inc
1094867530
d:|altera|quartus42|libraries|megafunctions|altqpram.inc
1094868820
d:|altera|quartus42|libraries|megafunctions|alt_le_rden_reg.inc
1094867966
d:|altera|quartus42|libraries|megafunctions|altsyncram.inc
1094868954
d:|altera|quartus42|libraries|megafunctions|aglobal42.inc
1101745276
}
# memory_file {
none
0
}
# end
# complete

