Flow Status : Successful - Wed Aug 09 02:35:23 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : FIFO_16_16
Top-level Entity Name : FIFO_16_16
Family : ACEX1K
Met timing requirements : N/A
Total logic elements : 107 / 576 ( 18 % )
Total pins : 39 / 66 ( 59 % )
Total memory bits : 256 / 12,288 ( 2 % )
Total PLLs : 0 / 1 ( 0 % )
Device : EP1K10TC100-1
Timing Models : Final
